Lines Matching +full:write +full:- +full:command
4 * SPDX-License-Identifier: Apache-2.0
19 #include <zephyr/linker/linker-defs.h>
50 * ILM(ILM -> CPU)instead of flash(flash -> I-Cache -> CPU) if enabled.
54 /* page program command */
56 /* sector erase command (erase size is 4KB) */
58 /* command for flash write */
60 /* Write status register */
62 /* Write disable */
64 /* Write enable */
76 /* Internal write operation is in progress */
78 /* Device is memory Write enabled */
98 /* I-Cache tag sram reset */ in ramcode_reset_i_cache()
99 gctrl_regs->GCTRL_MCCR |= IT8XXX2_GCTRL_ICACHE_RESET; in ramcode_reset_i_cache()
100 /* Make sure the I-Cache is reset */ in ramcode_reset_i_cache()
103 gctrl_regs->GCTRL_MCCR &= ~IT8XXX2_GCTRL_ICACHE_RESET; in ramcode_reset_i_cache()
111 * ECINDAR3-0 are EC-indirect memory address registers. in ramcode_flash_follow_mode()
116 flash_regs->SMFI_ECINDAR3 = (EC_INDIRECT_READ_INTERNAL_FLASH | in ramcode_flash_follow_mode()
120 flash_regs->SMFI_ECINDAR2 = (FLASH_FSCE_HIGH_ADDRESS >> 16) & GENMASK(7, 0); in ramcode_flash_follow_mode()
121 flash_regs->SMFI_ECINDAR1 = (FLASH_FSCE_HIGH_ADDRESS >> 8) & GENMASK(7, 0); in ramcode_flash_follow_mode()
122 flash_regs->SMFI_ECINDAR0 = FLASH_FSCE_HIGH_ADDRESS & GENMASK(7, 0); in ramcode_flash_follow_mode()
124 /* Writing 0 to EC-indirect memory data register */ in ramcode_flash_follow_mode()
125 flash_regs->SMFI_ECINDDR = 0x00; in ramcode_flash_follow_mode()
133 flash_regs->SMFI_ECINDAR3 = EC_INDIRECT_READ_INTERNAL_FLASH; in ramcode_flash_follow_mode_exit()
134 flash_regs->SMFI_ECINDAR2 = 0x00; in ramcode_flash_follow_mode_exit()
143 flash_regs->SMFI_ECINDAR1 = (FLASH_FSCE_HIGH_ADDRESS >> 8) & GENMASK(7, 0); in ramcode_flash_fsce_high()
150 * value will be: ((N-1) / 65.536 kHz) to (N / 65.536 kHz). in ramcode_flash_fsce_high()
154 gctrl_regs->GCTRL_WNCKR = 0; in ramcode_flash_fsce_high()
155 gctrl_regs->GCTRL_WNCKR = 0; in ramcode_flash_fsce_high()
157 /* Writing 0 to EC-indirect memory data register */ in ramcode_flash_fsce_high()
158 flash_regs->SMFI_ECINDDR = 0x00; in ramcode_flash_fsce_high()
165 /* Write data to FMOSI */ in ramcode_flash_write_dat()
166 flash_regs->SMFI_ECINDDR = wdata; in ramcode_flash_write_dat()
176 flash_regs->SMFI_ECINDAR1 = (FLASH_FSCE_LOW_ADDRESS >> 8) & GENMASK(7, 0); in ramcode_flash_transaction()
177 /* Write data to FMOSI */ in ramcode_flash_transaction()
179 flash_regs->SMFI_ECINDDR = wbuf[i]; in ramcode_flash_transaction()
183 rbuf[i] = flash_regs->SMFI_ECINDDR; in ramcode_flash_transaction()
197 /* Send read status command */ in ramcode_flash_cmd_read_status()
203 * e-flash's status instead of breaking loop. in ramcode_flash_cmd_read_status()
204 * This will avoid fetching unknown instruction from e-flash in ramcode_flash_cmd_read_status()
207 while ((flash_regs->SMFI_ECINDDR & mask) != target) { in ramcode_flash_cmd_read_status()
220 /* enter EC-indirect follow mode */ in ramcode_flash_cmd_write_enable()
222 /* send write enable command */ in ramcode_flash_cmd_write_enable()
224 /* read status and make sure busy bit cleared and write enabled. */ in ramcode_flash_cmd_write_enable()
226 /* exit EC-indirect follow mode */ in ramcode_flash_cmd_write_enable()
234 /* enter EC-indirect follow mode */ in ramcode_flash_cmd_write_disable()
236 /* send write disable command */ in ramcode_flash_cmd_write_disable()
240 /* exit EC-indirect follow mode */ in ramcode_flash_cmd_write_disable()
254 return -EINVAL; in ramcode_flash_verify()
258 /* verify for write */ in ramcode_flash_verify()
261 return -EINVAL; in ramcode_flash_verify()
275 /* enter EC-indirect follow mode */ in ramcode_flash_cmd_write()
277 /* send flash write command (aai word or page program) */ in ramcode_flash_cmd_write()
285 * we want to restart the write sequence every IDEAL_SIZE in ramcode_flash_cmd_write()
294 /* send write enable command */ in ramcode_flash_cmd_write()
296 /* make sure busy bit cleared and write enabled. */ in ramcode_flash_cmd_write()
298 /* re-send write command */ in ramcode_flash_cmd_write()
309 /* exit EC-indirect follow mode */ in ramcode_flash_cmd_write()
325 /* enter EC-indirect follow mode */ in ramcode_flash_cmd_erase()
327 /* send erase command */ in ramcode_flash_cmd_erase()
331 /* exit EC-indirect follow mode */ in ramcode_flash_cmd_erase()
351 flash_regs->SMFI_ECINDAR3 = EC_INDIRECT_READ_INTERNAL_FLASH; in flash_it8xxx2_read()
352 flash_regs->SMFI_ECINDAR2 = (offset >> 16) & GENMASK(7, 0); in flash_it8xxx2_read()
353 flash_regs->SMFI_ECINDAR1 = (offset >> 8) & GENMASK(7, 0); in flash_it8xxx2_read()
354 flash_regs->SMFI_ECINDAR0 = (offset & GENMASK(7, 0)); in flash_it8xxx2_read()
357 * Read/Write to this register will access one byte on the in flash_it8xxx2_read()
358 * flash with the 32-bit flash address defined in ECINDAR3-0 in flash_it8xxx2_read()
360 data_t[i] = flash_regs->SMFI_ECINDDR; in flash_it8xxx2_read()
368 /* Write data to the flash, page by page */
372 struct flash_it8xxx2_dev_data *data = dev->data; in flash_it8xxx2_write()
373 int ret = -EINVAL; in flash_it8xxx2_write()
377 * Check that the offset and length are multiples of the write in flash_it8xxx2_write()
381 return -EINVAL; in flash_it8xxx2_write()
384 return -EINVAL; in flash_it8xxx2_write()
387 return -EACCES; in flash_it8xxx2_write()
390 k_sem_take(&data->sem, K_FOREVER); in flash_it8xxx2_write()
393 * EC-indirect follow mode to access flash, interrupts need to be in flash_it8xxx2_write()
406 k_sem_give(&data->sem); in flash_it8xxx2_write()
414 struct flash_it8xxx2_dev_data *data = dev->data; in flash_it8xxx2_erase()
415 int v_size = len, v_addr = offset, ret = -EINVAL; in flash_it8xxx2_erase()
419 * Check that the offset and length are multiples of the write in flash_it8xxx2_erase()
423 return -EINVAL; in flash_it8xxx2_erase()
426 return -EINVAL; in flash_it8xxx2_erase()
429 return -EACCES; in flash_it8xxx2_erase()
432 k_sem_take(&data->sem, K_FOREVER); in flash_it8xxx2_erase()
435 * EC-indirect follow mode to access flash, interrupts need to be in flash_it8xxx2_erase()
440 /* Always use sector erase command */ in flash_it8xxx2_erase()
441 for (; len > 0; len -= FLASH_ERASE_BLK_SZ) { in flash_it8xxx2_erase()
452 k_sem_give(&data->sem); in flash_it8xxx2_erase()
468 struct flash_it8xxx2_dev_data *data = dev->data; in flash_it8xxx2_init()
471 flash_regs->SMFI_ECINDAR3 = EC_INDIRECT_READ_INTERNAL_FLASH; in flash_it8xxx2_init()
475 * than 256K-byte, enable the page program cycle constructed in flash_it8xxx2_init()
476 * by EC-Indirect Follow Mode. in flash_it8xxx2_init()
478 flash_regs->SMFI_FLHCTRL6R |= IT8XXX2_SMFI_MASK_ECINDPP; in flash_it8xxx2_init()
481 k_sem_init(&data->sem, 1, 1); in flash_it8xxx2_init()
504 .write = flash_it8xxx2_write,