18 #define CNF_GET_INIT_COMP(x)				(FIELD_GET(BIT(9), x))  argument
19 #define CNF_GET_INIT_FAIL(x)				(FIELD_GET(BIT(10), x))  argument
20 #define CNF_GET_CTRL_BUSY(x)				(FIELD_GET(BIT(8), x))  argument
21 #define GET_PAGE_SIZE(x)				(FIELD_GET(GENMASK(15, 0), x))  argument
22 #define GET_PAGES_PER_BLOCK(x)				(FIELD_GET(GENMASK(15, 0), x))  argument
23 #define GET_SPARE_SIZE(x)				(FIELD_GET(GENMASK(31, 16), x))  argument
24 #define ONFI_TIMING_MODE_SDR(x)				(FIELD_GET(GENMASK(15, 0), x))  argument
25 #define ONFI_TIMING_MODE_NVDDR(x)			(FIELD_GET(GENMASK(31, 15), x))  argument
28 #define CNF_GET_NLUNS(x)				(FIELD_GET(GENMASK(7, 0), x))  argument
29 #define CNF_GET_DEV_TYPE(x)				(FIELD_GET(GENMASK(31, 30), x))  argument
48 #define CNF_HW_NF_16_SUPPORT(x)				(FIELD_GET(BIT(29), x))  argument
49 #define CNF_HW_NVDDR_SS_SUPPORT(x)			(FIELD_GET(BIT(27), x))  argument
50 #define CNF_HW_ASYNC_SUPPORT(x)				(FIELD_GET(BIT(26), x))  argument
51 #define CNF_HW_DMA_DATA_WIDTH_SUPPORT(x)		(FIELD_GET(BIT(21), x))  argument
52 #define CNF_HW_DMA_ADDR_WIDTH_SUPPORT(x)		(FIELD_GET(BIT(20), x))  argument
53 #define CNF_HW_DI_PR_SUPPORT(x)				(FIELD_GET(BIT(14), x))  argument
54 #define CNF_HW_ECC_SUPPORT(x)				(FIELD_GET(BIT(17), x))  argument
55 #define CNF_HW_RMP_SUPPORT(x)				(FIELD_GET(BIT(12), x))  argument
56 #define CNF_HW_DI_CRC_SUPPORT(x)			(FIELD_GET(BIT(8), x))  argument
57 #define CNF_HW_WR_PT_SUPPORT(x)				(FIELD_GET(BIT(9), x))  argument
129 #define CNF_ASYNC_TIMINGS_TWH				FIELD_PREP(GENMASK(12, 8), 2)
135 #define CNF_CMN_SETTINGS_DEV16				(8)
154 #define CDMA_CF_DMA_MASTER_SET(x)			FIELD_PREP(BIT(CDMA_CF_DMA_MASTER), x)  argument
156 #define F_CFLAGS_VOL_ID_SET(x)				FIELD_PREP(GENMASK(7, 4), x)  argument
157 #define CDMA_CF_INT					(8)
159 #define	COMMON_SET_DEVICE_16BIT				(8)
162 #define MAX_PAGES_IN_ONE_DSC				(8)
193 #define CMD_0_THREAD_POS_SET(x)                         (FIELD_PREP(GENMASK(26, 24), x))  argument
195 #define CMD_0_C_MODE_SET(x)                             (FIELD_PREP(GENMASK(31, 30), x))  argument
196 #define CMD_0_VOL_ID_SET(x)                             (FIELD_PREP(GENMASK(19, 16), x))  argument
206 #define F_BURST_SEL_SET(x)				(FIELD_PREP(GENMASK(7, 0), x))  argument
212 #define PRE_FETCH_VALUE					(1024/8)
213 #define NF_FIFO_TRIGG_LVL_SET(x)			(FIELD_PREP(GENMASK(15, 0), x))  argument
214 #define NF_DMA_PACKAGE_SIZE_SET(x)			(FIELD_PREP(GENMASK(31, 16), x))  argument
228 #define NF_CMD4_BANK_SET(x)				(FIELD_PREP(GENMASK(31, 24), x))  argument
230 #define PIO_CMD0_CT_SET(x)                              (FIELD_PREP(GENMASK(15, 0), x))  argument
234 #define PIO_CF_DMA_MASTER_SET(x)			(FIELD_PREP(BIT(PIO_CF_DMA_MASTER), x))  argument
269 #define GEN_LAST_SECTOR_SIZE_SET(x)                     (FIELD_PREP(GENMASK64(55, 40), x))  argument
280 #define PAGE_MAX_BYTES(x)				(FIELD_PREP(GENMASK64(13, 11), x))  argument
282 #define GEN_CF_INT_SET(x)				(FIELD_PREP(BIT(GEN_CF_INT), x))  argument
285 #define GEN_DIR_SET(x)					(FIELD_PREP(BIT64(11), x))  argument
286 #define GEN_SECTOR_SET(x)			        (FIELD_PREP(GENMASK64(31, 16), x))  argument
288 #define GEN_ADDR_WRITE_DATA(x)                          (FIELD_PREP(GENMASK64(63, 32), x))  argument
293 #define ROW_VAL_SET(x, y, z)                            (FIELD_PREP(GENMASK(x, y), z))  argument
294 #define SET_FEAT_ADDR(x)				(FIELD_PREP(GENMASK(7, 0), x))  argument
295 #define THREAD_VAL(x)					(FIELD_PREP(GENMASK(2, 0), x))  argument
296 #define INCR_CMD_TYPE(x)				(x++)  argument
297 #define DECR_CNT_ONE(x)					(--x)  argument
298 #define GET_INIT_SET_CHECK(x, y)			(FIELD_GET(BIT(y), x))  argument
300 	uint32_t ctrl_rev:8;
301 	uint32_t ctrl_fix:8;