Lines Matching refs:phy_addr
93 uint8_t phy_addr; member
113 return mdio_read(cfg->mdio, cfg->phy_addr, reg, (uint16_t *)data); in phy_mc_t1s_read()
120 return mdio_write(cfg->mdio, cfg->phy_addr, reg, (uint16_t)data); in phy_mc_t1s_write()
128 ret = mdio_write(cfg->mdio, cfg->phy_addr, MII_MMD_ACR, devad); in mdio_setup_c45_indirect_access()
133 ret = mdio_write(cfg->mdio, cfg->phy_addr, MII_MMD_AADR, reg); in mdio_setup_c45_indirect_access()
138 return mdio_write(cfg->mdio, cfg->phy_addr, MII_MMD_ACR, devad | BIT(14)); in mdio_setup_c45_indirect_access()
146 ret = mdio_read_c45(cfg->mdio, cfg->phy_addr, devad, reg, val); in phy_mc_t1s_c45_read()
155 return mdio_read(cfg->mdio, cfg->phy_addr, MII_MMD_AADR, val); in phy_mc_t1s_c45_read()
166 ret = mdio_write_c45(cfg->mdio, cfg->phy_addr, devad, reg, val); in phy_mc_t1s_c45_write()
175 return mdio_write(cfg->mdio, cfg->phy_addr, MII_MMD_AADR, val); in phy_mc_t1s_c45_write()
200 LOG_INF("PHY (%d) Link speed 10 Mbps, half duplex\n", cfg->phy_addr); in phy_mc_t1s_get_link()
558 .phy_addr = DT_INST_REG_ADDR(n), \