50 	const struct phy_dm8806_config *cfg = drv_data->dev->config;  in phy_dm8806_gpio_callback()  local
52 	gpio_pin_interrupt_configure_dt(&cfg->gpio_int, GPIO_INT_DISABLE);  in phy_dm8806_gpio_callback()
61 	const struct phy_dm8806_config *cfg = dev->config;  in phy_dm8806_thread_cb()  local
69 	mdio_read(cfg->mdio, INT_STAT_PHY_ADDR, INT_STAT_REG_ADDR, &data);  in phy_dm8806_thread_cb()
71 	mdio_write(cfg->mdio, INT_STAT_PHY_ADDR, INT_STAT_REG_ADDR, data);  in phy_dm8806_thread_cb()
72 	gpio_pin_interrupt_configure_dt(&cfg->gpio_int, GPIO_INT_EDGE_TO_ACTIVE);  in phy_dm8806_thread_cb()
90 	const struct phy_dm8806_config *cfg = dev->config;  in phy_dm8806_port_init()  local
92 	res = gpio_pin_configure_dt(&cfg->gpio_rst, (GPIO_OUTPUT_INACTIVE | GPIO_PULL_UP));  in phy_dm8806_port_init()
98 	gpio_pin_set_dt(&cfg->gpio_rst, true);  in phy_dm8806_port_init()
107 	res = gpio_pin_set_dt(&cfg->gpio_rst, false);  in phy_dm8806_port_init()
122 	const struct phy_dm8806_config *cfg = dev->config;  in phy_dm8806_init_interrupt()  local
128 	res = mdio_read(cfg->mdio, INT_MASK_CTRL_PHY_ADDR, INT_MASK_CTRL_REG_ADDR, &data);  in phy_dm8806_init_interrupt()
134 	res = mdio_write(cfg->mdio, INT_MASK_CTRL_PHY_ADDR, INT_MASK_CTRL_REG_ADDR, data);  in phy_dm8806_init_interrupt()
143 	res = mdio_read(cfg->mdio, WOLL_CTRL_REG_PHY_ADDR, WOLL_CTRL_REG_REG_ADDR, &data);  in phy_dm8806_init_interrupt()
149 	res = mdio_write(cfg->mdio, WOLL_CTRL_REG_PHY_ADDR, WOLL_CTRL_REG_REG_ADDR, data);  in phy_dm8806_init_interrupt()
159 	if (device_is_ready(cfg->gpio_int.port) != true) {  in phy_dm8806_init_interrupt()
164 	res = gpio_pin_configure_dt(&cfg->gpio_int, GPIO_INPUT);  in phy_dm8806_init_interrupt()
172 	gpio_init_callback(&drv_data->gpio_cb, phy_dm8806_gpio_callback, BIT(cfg->gpio_int.pin));  in phy_dm8806_init_interrupt()
173 	res = gpio_add_callback(cfg->gpio_int.port, &drv_data->gpio_cb);  in phy_dm8806_init_interrupt()
185 	gpio_pin_interrupt_configure_dt(&cfg->gpio_int, GPIO_INT_EDGE_TO_ACTIVE);  in phy_dm8806_init_interrupt()
199 	const struct phy_dm8806_config *cfg = dev->config;  in phy_dm8806_init()  local
210 	ret = mdio_read(cfg->mdio, PHY_ADDRESS_18H, PORT5_MAC_CONTROL, &val);  in phy_dm8806_init()
220 	ret = mdio_write(cfg->mdio, PHY_ADDRESS_18H, PORT5_MAC_CONTROL, val);  in phy_dm8806_init()
226 	ret = mdio_read(cfg->mdio, PHY_ADDRESS_18H, IRQ_LED_CONTROL, &val);  in phy_dm8806_init()
234 	ret = mdio_write(cfg->mdio, PHY_ADDRESS_18H, IRQ_LED_CONTROL, val);  in phy_dm8806_init()
255 	const struct phy_dm8806_config *cfg = dev->config;  in phy_dm8806_get_link_state()  local
258 	ret = mdio_read(cfg->mdio, 0x18, 0x18, &data);  in phy_dm8806_get_link_state()
265 	ret = mdio_read(cfg->mdio, cfg->switch_addr, PORTX_SWITCH_STATUS, &data);  in phy_dm8806_get_link_state()
306 	const struct phy_dm8806_config *cfg = dev->config;  in phy_dm8806_cfg_link()  local
328 	ret = mdio_read(cfg->mdio, cfg->phy_addr, PORTX_PHY_CONTROL_REGISTER, &data);  in phy_dm8806_cfg_link()
335 	ret = mdio_write(cfg->mdio, cfg->phy_addr, PORTX_PHY_CONTROL_REGISTER, data);  in phy_dm8806_cfg_link()
343 	ret = mdio_read(cfg->mdio, cfg->phy_addr, PORTX_PHY_CONTROL_REGISTER, &data);  in phy_dm8806_cfg_link()
350 	ret = mdio_write(cfg->mdio, cfg->phy_addr, PORTX_PHY_CONTROL_REGISTER, data);  in phy_dm8806_cfg_link()
358 	ret = mdio_read(cfg->mdio, cfg->phy_addr, PORTX_PHY_CONTROL_REGISTER, &data);  in phy_dm8806_cfg_link()
366 	ret = mdio_write(cfg->mdio, cfg->phy_addr, PORTX_PHY_CONTROL_REGISTER, data);  in phy_dm8806_cfg_link()
374 	ret = mdio_read(cfg->mdio, cfg->phy_addr, PORTX_PHY_CONTROL_REGISTER, &data);  in phy_dm8806_cfg_link()
381 	ret = mdio_write(cfg->mdio, cfg->phy_addr, PORTX_PHY_CONTROL_REGISTER, data);  in phy_dm8806_cfg_link()
393 	const struct phy_dm8806_config *cfg = dev->config;  in phy_dm8806_reg_read()  local
395 	res = mdio_read(cfg->mdio, cfg->switch_addr, reg_addr, (uint16_t *)data);  in phy_dm8806_reg_read()
406 	const struct phy_dm8806_config *cfg = dev->config;  in phy_dm8806_reg_write()  local
408 	res = mdio_write(cfg->mdio, cfg->switch_addr, reg_addr, data);  in phy_dm8806_reg_write()
420 	const struct phy_dm8806_config *cfg = dev->config;  in phy_dm8806_link_cb_set()  local
422 	res = gpio_pin_interrupt_configure_dt(&cfg->gpio_int, GPIO_INT_DISABLE);  in phy_dm8806_link_cb_set()
429 	gpio_pin_interrupt_configure_dt(&cfg->gpio_int, GPIO_INT_EDGE_TO_ACTIVE);  in phy_dm8806_link_cb_set()