Lines Matching +full:clock +full:- +full:select
3 # Copyright (c) 2016-2017 ARM Ltd
5 # SPDX-License-Identifier: Apache-2.0
17 select NOCACHE_MEMORY if HAS_MCUX_CACHE && CPU_HAS_DCACHE
18 select ARM_MPU if CPU_CORTEX_M7
19 select MDIO if DT_HAS_NXP_ENET_MDIO_ENABLED
20 select NET_POWER_MANAGEMENT if (PM_DEVICE && SOC_FAMILY_KINETIS)
21 select ETH_DSA_SUPPORT
22 select PINCTRL
28 select NOCACHE_MEMORY if HAS_MCUX_CACHE && CPU_HAS_DCACHE
29 select ARM_MPU if CPU_CORTEX_M7
30 select NET_POWER_MANAGEMENT if PM_DEVICE
31 select ETH_DSA_SUPPORT
32 select DEPRECATED
33 select PINCTRL
62 - IPv4, UDP and TCP checksum (both Rx and Tx)
113 - IPv4, UDP and TCP checksum (both Rx and Tx)
132 bool "RMII clock from external sources"
134 Setting this option will configure MCUX clock block to feed RMII
135 reference clock from external source (ENET_1588_CLKIN)
141 communication with MAC ENET controller. Other busses - like SPI
160 Reset the ethernet PHY at boot. Requires dts properties int-gpios and
161 reset-gpios to be present.
164 bool "MCUX PTP clock driver support"
168 Enable MCUX PTP clock support.
173 int "Frequency of the clock source for the PTP timer"
185 MCUX PTP Clock initialization priority level. There is