147 		XMC_ETH_MAC_DMA_DESC_t *dma_desc = &tx_dma_desc[i];  in eth_xmc4xxx_tx_dma_descriptors_init()  local
149 		dma_desc->buffer2 = (volatile uint32_t)&tx_dma_desc[i + 1];  in eth_xmc4xxx_tx_dma_descriptors_init()
232 	XMC_ETH_MAC_DMA_DESC_t *dma_desc = NULL;  in eth_xmc4xxx_send()  local
286 		dma_desc = &tx_dma_desc[dev_data->dma_desc_tx_head];  in eth_xmc4xxx_send()
291 		dma_desc->buffer1 = (volatile uint32_t)frag_data;  in eth_xmc4xxx_send()
292 		dma_desc->length = frag_len;  in eth_xmc4xxx_send()
296 		dma_desc->status = ETH_MAC_DMA_TDES0_CIC | ETH_MAC_DMA_TDES0_TCH;  in eth_xmc4xxx_send()
301 			dma_desc->status |= ETH_MAC_DMA_TDES0_OWN;  in eth_xmc4xxx_send()
303 			dma_desc->status |= ETH_MAC_DMA_TDES0_FS;  in eth_xmc4xxx_send()
309 				dma_desc->status |= ETH_MAC_DMA_TDES0_TTSE;  in eth_xmc4xxx_send()
337 	dma_desc->status |= ETH_MAC_DMA_TDES0_IC | ETH_MAC_DMA_TDES0_LS;  in eth_xmc4xxx_send()
361 	XMC_ETH_MAC_DMA_DESC_t *dma_desc;  in eth_xmc4xxx_rx_pkt()  local
367 	dma_desc = &rx_dma_desc[tail];  in eth_xmc4xxx_rx_pkt()
369 	if (IS_OWNED_BY_DMA_RX(dma_desc)) {  in eth_xmc4xxx_rx_pkt()
373 	if (!IS_START_OF_FRAME_RX(dma_desc)) {  in eth_xmc4xxx_rx_pkt()
379 	while (!IS_OWNED_BY_DMA_RX(dma_desc)) {  in eth_xmc4xxx_rx_pkt()
380 		eof_found = IS_END_OF_FRAME_RX(dma_desc);  in eth_xmc4xxx_rx_pkt()
393 		dma_desc = &rx_dma_desc[tail];  in eth_xmc4xxx_rx_pkt()
413 	dma_desc = &rx_dma_desc[tail];  in eth_xmc4xxx_rx_pkt()
420 				frag_len = TOTAL_FRAME_LENGTH(dma_desc) -  in eth_xmc4xxx_rx_pkt()
423 				if (IS_TIMESTAMP_AVAILABLE_RX(dma_desc)) {  in eth_xmc4xxx_rx_pkt()
425 						.second = dma_desc->time_stamp_seconds,  in eth_xmc4xxx_rx_pkt()
426 						.nanosecond = dma_desc->time_stamp_nanoseconds};  in eth_xmc4xxx_rx_pkt()
456 		dma_desc->buffer1 = (uint32_t)dev_data->rx_frag_list[tail]->data;  in eth_xmc4xxx_rx_pkt()
457 		dma_desc->length = dev_data->rx_frag_list[tail]->size |  in eth_xmc4xxx_rx_pkt()
459 		dma_desc->status = ETH_MAC_DMA_RDES0_OWN;  in eth_xmc4xxx_rx_pkt()
466 		dma_desc = &rx_dma_desc[tail];  in eth_xmc4xxx_rx_pkt()
526 			XMC_ETH_MAC_DMA_DESC_t *dma_desc = &tx_dma_desc[tx_frame->head_index];  in eth_xmc4xxx_handle_tx()  local
528 			if (IS_TIMESTAMP_AVAILABLE_TX(dma_desc)) {  in eth_xmc4xxx_handle_tx()
533 						.second = dma_desc->time_stamp_seconds,  in eth_xmc4xxx_handle_tx()
534 						.nanosecond = dma_desc->time_stamp_nanoseconds};  in eth_xmc4xxx_handle_tx()
700 		XMC_ETH_MAC_DMA_DESC_t *dma_desc = &rx_dma_desc[i];  in eth_xmc4xxx_rx_dma_descriptors_init()  local
702 		dma_desc->buffer2 = (volatile uint32_t)&rx_dma_desc[i + 1];  in eth_xmc4xxx_rx_dma_descriptors_init()
709 		XMC_ETH_MAC_DMA_DESC_t *dma_desc = &rx_dma_desc[i];  in eth_xmc4xxx_rx_dma_descriptors_init()  local
720 		dma_desc->buffer1 = (uint32_t)rx_buf->data;  in eth_xmc4xxx_rx_dma_descriptors_init()
721 		dma_desc->length = rx_buf->size | ETH_RX_DMA_DESC_SECOND_ADDR_CHAINED_MASK;  in eth_xmc4xxx_rx_dma_descriptors_init()
722 		dma_desc->status = ETH_MAC_DMA_RDES0_OWN;  in eth_xmc4xxx_rx_dma_descriptors_init()