Lines Matching refs:sys_write32

204 		sys_write32(reg_val, dev_conf->base_addr +  in DT_INST_FOREACH_STATUS_OKAY()
297 sys_write32(ETH_XLNX_GEM_IXR_TX_COMPLETE_BIT, in eth_xlnx_gem_isr()
299 sys_write32(ETH_XLNX_GEM_IXR_TX_COMPLETE_BIT, in eth_xlnx_gem_isr()
308 sys_write32(ETH_XLNX_GEM_IXR_FRAME_RX_BIT, in eth_xlnx_gem_isr()
310 sys_write32(ETH_XLNX_GEM_IXR_FRAME_RX_BIT, in eth_xlnx_gem_isr()
328 sys_write32((0xFFFFFFFF & ~(ETH_XLNX_GEM_IXR_FRAME_RX_BIT | in eth_xlnx_gem_isr()
400 sys_write32(ETH_XLNX_GEM_IXR_TX_COMPLETE_BIT, in eth_xlnx_gem_send()
413 sys_write32(ETH_XLNX_GEM_IXR_TX_COMPLETE_BIT, in eth_xlnx_gem_send()
432 sys_write32(ETH_XLNX_GEM_IXR_TX_COMPLETE_BIT, in eth_xlnx_gem_send()
456 sys_write32(reg_val, reg_ctrl); in eth_xlnx_gem_send()
479 sys_write32(reg_val, reg_ctrl); in eth_xlnx_gem_send()
487 sys_write32(reg_val, reg_ctrl); in eth_xlnx_gem_send()
493 sys_write32(reg_val, dev_conf->base_addr + ETH_XLNX_GEM_NWCTRL_OFFSET); in eth_xlnx_gem_send()
536 sys_write32(ETH_XLNX_GEM_IXR_ALL_MASK, in eth_xlnx_gem_start_device()
538 sys_write32(ETH_XLNX_GEM_IXR_ALL_MASK, in eth_xlnx_gem_start_device()
542 sys_write32(0xFFFFFFFF, dev_conf->base_addr + ETH_XLNX_GEM_TXSR_OFFSET); in eth_xlnx_gem_start_device()
543 sys_write32(0xFFFFFFFF, dev_conf->base_addr + ETH_XLNX_GEM_RXSR_OFFSET); in eth_xlnx_gem_start_device()
548 sys_write32(reg_val, dev_conf->base_addr + ETH_XLNX_GEM_NWCTRL_OFFSET); in eth_xlnx_gem_start_device()
551 sys_write32(ETH_XLNX_GEM_IXR_ALL_MASK, in eth_xlnx_gem_start_device()
592 sys_write32(reg_val, dev_conf->base_addr + ETH_XLNX_GEM_NWCTRL_OFFSET); in eth_xlnx_gem_stop_device()
595 sys_write32(ETH_XLNX_GEM_IXR_ALL_MASK, in eth_xlnx_gem_stop_device()
597 sys_write32(ETH_XLNX_GEM_IXR_ALL_MASK, in eth_xlnx_gem_stop_device()
601 sys_write32(0xFFFFFFFF, dev_conf->base_addr + ETH_XLNX_GEM_TXSR_OFFSET); in eth_xlnx_gem_stop_device()
602 sys_write32(0xFFFFFFFF, dev_conf->base_addr + ETH_XLNX_GEM_RXSR_OFFSET); in eth_xlnx_gem_stop_device()
746 sys_write32(0x00000000, in eth_xlnx_gem_reset_hw()
750 sys_write32(ETH_XLNX_GEM_STATCLR_MASK, in eth_xlnx_gem_reset_hw()
754 sys_write32(ETH_XLNX_GEM_TXSRCLR_MASK, in eth_xlnx_gem_reset_hw()
756 sys_write32(ETH_XLNX_GEM_RXSRCLR_MASK, in eth_xlnx_gem_reset_hw()
760 sys_write32(ETH_XLNX_GEM_IDRCLR_MASK, in eth_xlnx_gem_reset_hw()
764 sys_write32(0x00000000, in eth_xlnx_gem_reset_hw()
766 sys_write32(0x00000000, in eth_xlnx_gem_reset_hw()
870 sys_write32((tmp & ~ETH_XLNX_CRL_APB_WPROT_BIT), in eth_xlnx_gem_configure_clocks()
873 sys_write32(clk_ctrl_reg, dev_conf->clk_ctrl_reg_address); in eth_xlnx_gem_configure_clocks()
875 sys_write32(tmp, ETH_XLNX_CRL_APB_WPROT_REGISTER_ADDRESS); in eth_xlnx_gem_configure_clocks()
888 sys_write32(clk_ctrl_reg, dev_conf->clk_ctrl_reg_address); in eth_xlnx_gem_configure_clocks()
1014 sys_write32(reg_val, dev_conf->base_addr + ETH_XLNX_GEM_NWCFG_OFFSET); in eth_xlnx_gem_set_initial_nwcfg()
1045 sys_write32(reg_val, dev_conf->base_addr + ETH_XLNX_GEM_NWCFG_OFFSET); in eth_xlnx_gem_set_nwcfg_link_speed()
1073 sys_write32(regval_bot, dev_conf->base_addr + ETH_XLNX_GEM_LADDR1L_OFFSET); in eth_xlnx_gem_set_mac_address()
1074 sys_write32(regval_top, dev_conf->base_addr + ETH_XLNX_GEM_LADDR1H_OFFSET); in eth_xlnx_gem_set_mac_address()
1149 sys_write32(reg_val, dev_conf->base_addr + ETH_XLNX_GEM_DMACR_OFFSET); in eth_xlnx_gem_set_initial_dmacr()
1381 sys_write32((uint32_t)dev_data->rxbd_ring.first_bd, in eth_xlnx_gem_configure_buffers()
1383 sys_write32((uint32_t)dev_data->txbd_ring.first_bd, in eth_xlnx_gem_configure_buffers()
1539 sys_write32(reg_val, reg_addr); in eth_xlnx_gem_handle_rx_pending()
1561 sys_write32(0xFFFFFFFF, dev_conf->base_addr + ETH_XLNX_GEM_RXSR_OFFSET); in eth_xlnx_gem_handle_rx_pending()
1563 sys_write32(ETH_XLNX_GEM_IXR_FRAME_RX_BIT, in eth_xlnx_gem_handle_rx_pending()
1651 sys_write32(reg_val, reg_ctrl); in eth_xlnx_gem_handle_tx_done()
1676 sys_write32(0xFFFFFFFF, dev_conf->base_addr + ETH_XLNX_GEM_TXSR_OFFSET); in eth_xlnx_gem_handle_tx_done()
1679 sys_write32(ETH_XLNX_GEM_IXR_TX_COMPLETE_BIT, in eth_xlnx_gem_handle_tx_done()