Lines Matching +full:offset +full:- +full:mode

3  * SPDX-License-Identifier: Apache-2.0
11 /* All Banks, Offset 0xe: Bank Select Register */
17 /* Bank 0, Offset 0x0: Transmit Control Register */
22 /* Bank 0, Offset 0x02: EPH status register */
26 /* Bank 0, Offset 0x4: Receive Control Register */
28 #define RCR_PRMS      0x0002 /* Promiscuous mode */
33 /* Bank0, Offset 0x6: Counter Register */
40 /* Bank 0, Offset 0x8: Memory information register */
45 /* bank 0, offset 0xa: receive/phy control register */
47 #define RPCR_ANEG	  0x0800 /* Put PHY in autonegotiation mode */
48 #define RPCR_DPLX	  0x1000 /* Put PHY in full-duplex mode */
54 #define RPCR_LED_LINK_FDX 0x3 /* Full-duplex link detect */
60 /* Bank 1, Offset 0x0: Configuration Register */
62 #define CR_EPH_POWER_EN 0x8000 /* Disable/enable low power mode */
64 /* Bank 1, Offset 0x2: Base Address Register */
75 /* Bank 1, Offset 0xc: Control Register */
80 /* Bank 2, Offset 0x0: MMU Command Register */
90 /* Bank2, Offset 0x2: Packet Number Register */
94 /* Bank2, Offset 0x3: Allocation Result Register */
99 /* Bank 2, Offset 0x4: FIFO Ports Register */
106 /* Bank2, Offset 0x6: Point Register */
114 /* Bank2, Offset 0x8: Data register */
118 /* Bank 2, Offset 0xc: Interrupt Status Registers */
132 /* Bank 3, Offset 0x8: Management interface register */
139 /* Bank 3, Offset 0xa: Revision Register */