Lines Matching +full:1 +full:- +full:bit
5 * SPDX-License-Identifier: Apache-2.0
29 #define ETH_TX_USED BIT(31)
30 #define ETH_TX_WRAP BIT(30)
31 #define ETH_TX_ERROR BIT(29)
32 #define ETH_TX_UNDERRUN BIT(28)
33 #define ETH_TX_EXHAUSTED BIT(27)
34 #define ETH_TX_NO_CRC BIT(16)
35 #define ETH_TX_LAST BIT(15)
36 #define ETH_TX_LENGTH (2048-1)
38 #define ETH_RX_ADDRESS ~(ETH_DESC_ALIGNMENT-1)
39 #define ETH_RX_WRAP BIT(1)
40 #define ETH_RX_OWNERSHIP BIT(0)
41 #define ETH_RX_BROADCAST BIT(31)
42 #define ETH_RX_MULTICAST_HASH BIT(30)
43 #define ETH_RX_UNICAST_HASH BIT(29)
44 #define ETH_RX_EXT_ADDR BIT(28)
45 #define ETH_RX_SAR1 BIT(26)
46 #define ETH_RX_SAR2 BIT(25)
47 #define ETH_RX_SAR3 BIT(24)
48 #define ETH_RX_SAR4 BIT(23)
49 #define ETH_RX_TYPE_ID BIT(22)
50 #define ETH_RX_VLAN_TAG BIT(21)
51 #define ETH_RX_PRIORITY_TAG BIT(20)
53 #define ETH_RX_CFI BIT(16)
54 #define ETH_RX_EOF BIT(15)
55 #define ETH_RX_SOF BIT(14)
57 #define ETH_RX_LENGTH (4096-1)
59 #define ETH_RX_ENABLE(base) (base->NETWORKCTRL |= ETH_NETWORKCTRL_ENBRX)
60 #define ETH_RX_DISABLE(base) (base->NETWORKCTRL &= ~ETH_NETWORKCTRL_ENBRX)
62 #define ETH_TX_ENABLE(base) (base->NETWORKCTRL |= ETH_NETWORKCTRL_ENBTX)
63 #define ETH_TX_DISABLE(base) (base->NETWORKCTRL &= ~ETH_NETWORKCTRL_ENBTX)
98 #define PIN_PHY_MDC {DT_INST_PROP_BY_IDX(0, location_phy_mdc, 1), \
101 #define PIN_PHY_MDIO {DT_INST_PROP_BY_IDX(0, location_phy_mdio, 1), \
108 #define PIN_RMII_CRSDV {DT_INST_PROP_BY_IDX(0, location_rmii_crs_dv, 1),\
111 #define PIN_RMII_TXD0 {DT_INST_PROP_BY_IDX(0, location_rmii_txd0, 1),\
114 #define PIN_RMII_TXD1 {DT_INST_PROP_BY_IDX(0, location_rmii_txd1, 1),\
117 #define PIN_RMII_TX_EN {DT_INST_PROP_BY_IDX(0, location_rmii_tx_en, 1),\
120 #define PIN_RMII_RXD0 {DT_INST_PROP_BY_IDX(0, location_rmii_rxd0, 1),\
123 #define PIN_RMII_RXD1 {DT_INST_PROP_BY_IDX(0, location_rmii_rxd1, 1),\
126 #define PIN_RMII_RX_ER {DT_INST_PROP_BY_IDX(0, location_rmii_rx_er, 1),\
133 * #define PIN_RMII_REFCLK {DT_INST_PROP_BY_IDX(0, location_rmii_refclk, 1),\