Lines Matching +full:16 +full:- +full:17

6  * SPDX-License-Identifier: Apache-2.0
10 * DesignWare Cores Ethernet Quality-of-Service Databook
76 #define REG_READ(r) sys_read32(p->base_addr + (r))
77 #define REG_WRITE(r, v) sys_write32((v), p->base_addr + (r))
107 #define MAC_CONF_JD BIT(17)
108 #define MAC_CONF_JE BIT(16)
133 #define MAC_EXT_CONF_SPEN BIT(17)
134 #define MAC_EXT_CONF_DCRCC BIT(16)
144 #define MAC_PKT_FILTER_VTFE BIT(16)
185 #define MAC_VLAN_TAG_CTRL_VTIM BIT(17)
186 #define MAC_VLAN_TAG_CTRL_ETV BIT(16)
196 /* 17.1.17 */
212 #define MAC_Qn_TX_FLOW_CTRL_PT GENMASK(31, 16)
261 #define MAC_IRQ_STATUS_FPEIS BIT(17)
282 #define MAC_IRQ_ENABLE_FPEIE BIT(17)
331 #define MAC_LPI_CTRL_STATUS_PLS BIT(17)
332 #define MAC_LPI_CTRL_STATUS_LPIEN BIT(16)
357 #define MAC_AN_CTRL_LR BIT(17)
358 #define MAC_AN_CTRL_ECD BIT(16)
414 #define MAC_PHYIF_CTRL_STATUS_LNKSPEED GENMASK(18, 17)
415 #define MAC_PHYIF_CTRL_STATUS_LNKMOD BIT(16)
442 #define MAC_HW_FEATURE0_RXCOESEL BIT(16)
468 #define MAC_HW_FEATURE1_SPHEN BIT(17)
469 #define MAC_HW_FEATURE1_DCBEN BIT(16)
497 #define MAC_HW_FEATURE3_ESTDEP GENMASK(19, 17)
498 #define MAC_HW_FEATURE3_ESTSEL BIT(16)
512 #define MAC_DPP_FSM_IRQ_STATUS_SLVTES BIT(17)
513 #define MAC_DPP_FSM_IRQ_STATUS_MSTTES BIT(16)
555 #define MAC_FSM_CTRL_RPEIN BIT(17)
556 #define MAC_FSM_CTRL_TPEIN BIT(16)
573 #define MAC_FSM_ACT_TIMER_NTMRMD GENMASK(19, 16)
583 #define MAC_MDIO_ADDRESS_RDA GENMASK(20, 16)
596 #define MAC_MDIO_DATA_RA GENMASK(31, 16)
670 #define MTL_IRQ_STATUS_DBGIS BIT(17)
671 #define MTL_IRQ_STATUS_MACIS BIT(16)
721 /* 17.2.16 */
725 /* 17.2.17 */
853 #define DMA_MODE_INTM GENMASK(17, 16)
869 #define DMA_SYSBUS_MODE_RD_OSR_LMT GENMASK(19, 16)
889 #define DMA_IRQ_STATUS_MACIS BIT(17)
890 #define DMA_IRQ_STATUS_MTLIS BIT(16)
950 #define DMA_CHn_CTRL_PBLx8 BIT(16)
960 #define DMA_CHn_TX_CTRL_PBL GENMASK(21, 16)
975 #define DMA_CHn_RX_CTRL_PBL GENMASK(21, 16)
1041 /* 17.6.16 */
1045 /* 17.6.17 */
1066 #define DMA_CHn_STATUS_TEB GENMASK(18, 16)
1102 #define TDES2_B2L GENMASK(29, 16)
1118 #define TDES3_CIC GENMASK(17, 16)
1119 #define TDES3_TPL GENMASK(17, 0)
1129 #define TDES3_TTSS BIT(17)
1130 #define TDES3_EUE BIT(16)
1154 #define RDES0_IVT GENMASK(31, 16)
1159 #define RDES1_OPC GENMASK(31, 16)
1179 #define RDES2_DAF BIT(17)
1180 #define RDES2_RXPI BIT(17)
1181 #define RDES2_SAF BIT(16)
1182 #define RDES2_RXPD BIT(16)
1203 #define RDES3_LT GENMASK(18, 16)