Lines Matching refs:p
38 struct eth_cyclonev_priv *p);
39 int eth_cyclonev_get_software_reset_status(uint32_t instance, struct eth_cyclonev_priv *p);
40 int eth_cyclonev_software_reset(uint32_t instance, struct eth_cyclonev_priv *p);
41 void eth_cyclonev_setup_rxdesc(struct eth_cyclonev_priv *p);
42 void eth_cyclonev_setup_txdesc(struct eth_cyclonev_priv *p);
47 struct eth_cyclonev_priv *p);
51 static void eth_cyclonev_receive(struct eth_cyclonev_priv *p);
52 static void eth_cyclonev_tx_release(struct eth_cyclonev_priv *p);
119 struct eth_cyclonev_priv *p) in eth_cyclonev_set_mac_addr() argument
135 sys_write32(tmpreg, EMAC_GMAC_MAC_ADDR_HIGH_ADDR(p->base_addr, n)); in eth_cyclonev_set_mac_addr()
142 sys_write32(tmpreg, EMAC_GMAC_MAC_ADDR_LOW_ADDR(p->base_addr, n)); in eth_cyclonev_set_mac_addr()
153 int eth_cyclonev_get_software_reset_status(uint32_t instance, struct eth_cyclonev_priv *p) in eth_cyclonev_get_software_reset_status() argument
158 return EMAC_DMA_MODE_SWR_GET(sys_read32(EMAC_DMAGRP_BUS_MODE_ADDR(p->base_addr))); in eth_cyclonev_get_software_reset_status()
170 int eth_cyclonev_software_reset(uint32_t instance, struct eth_cyclonev_priv *p) in eth_cyclonev_software_reset() argument
180 sys_set_bits(EMAC_DMAGRP_BUS_MODE_ADDR(p->base_addr), EMAC_DMA_MODE_SWR_SET_MSK); in eth_cyclonev_software_reset()
185 if (eth_cyclonev_get_software_reset_status(instance, p) == 0) { in eth_cyclonev_software_reset()
205 void eth_cyclonev_setup_rxdesc(struct eth_cyclonev_priv *p) in eth_cyclonev_setup_rxdesc() argument
212 rx_desc = &p->rx_desc_ring[i]; in eth_cyclonev_setup_rxdesc()
213 rx_desc->buffer1_addr = (uint32_t)&p->rx_buf[i * ETH_BUFFER_SIZE]; in eth_cyclonev_setup_rxdesc()
219 rx_desc->buffer2_next_desc_addr = (uint32_t)&p->rx_desc_ring[i + 1]; in eth_cyclonev_setup_rxdesc()
221 rx_desc->buffer2_next_desc_addr = (uint32_t)&p->rx_desc_ring[0]; in eth_cyclonev_setup_rxdesc()
225 p->rx_current_desc_number = 0; in eth_cyclonev_setup_rxdesc()
226 p->rxints = 0; in eth_cyclonev_setup_rxdesc()
229 sys_write32((uint32_t)&p->rx_desc_ring[0], in eth_cyclonev_setup_rxdesc()
230 EMAC_DMA_RX_DESC_LIST_ADDR(p->base_addr)); in eth_cyclonev_setup_rxdesc()
241 void eth_cyclonev_setup_txdesc(struct eth_cyclonev_priv *p) in eth_cyclonev_setup_txdesc() argument
249 tx_desc = &p->tx_desc_ring[i]; in eth_cyclonev_setup_txdesc()
250 tx_desc->buffer1_addr = (uint32_t)&p->tx_buf[i * ETH_BUFFER_SIZE]; in eth_cyclonev_setup_txdesc()
251 tx_desc->buffer2_next_desc_addr = (uint32_t)&p->tx_desc_ring[i + 1]; in eth_cyclonev_setup_txdesc()
256 tx_desc->buffer2_next_desc_addr = (uint32_t)&p->tx_desc_ring[0]; in eth_cyclonev_setup_txdesc()
260 p->tx_current_desc_number = 0; in eth_cyclonev_setup_txdesc()
261 p->txints = 0; in eth_cyclonev_setup_txdesc()
262 p->tx_tail = 0; in eth_cyclonev_setup_txdesc()
265 sys_write32((uint32_t)&p->tx_desc_ring[0], in eth_cyclonev_setup_txdesc()
266 EMAC_DMA_TX_DESC_LIST_ADDR(p->base_addr)); in eth_cyclonev_setup_txdesc()
281 struct eth_cyclonev_priv *p = dev->data; in eth_cyclonev_iface_init() local
283 p->iface = iface; in eth_cyclonev_iface_init()
285 net_if_set_link_addr(iface, p->mac_addr, sizeof(p->mac_addr), NET_LINK_ETHERNET); in eth_cyclonev_iface_init()
294 k_sem_init(&p->free_tx_descs, NB_TX_DESCS - 1, NB_TX_DESCS - 1); in eth_cyclonev_iface_init()
299 p->initialised = 1; in eth_cyclonev_iface_init()
317 struct eth_cyclonev_priv *p = dev->data; in eth_cyclonev_set_config() local
326 memcpy(p->mac_addr, config->mac_address.addr, sizeof(p->mac_addr)); in eth_cyclonev_set_config()
327 eth_cyclonev_set_mac_addr(p->mac_addr, cv_config->emac_index, 0, p); /* Set MAC */ in eth_cyclonev_set_config()
328 net_if_set_link_addr(p->iface, p->mac_addr, sizeof(p->mac_addr), NET_LINK_ETHERNET); in eth_cyclonev_set_config()
332 reg_val = sys_read32(EMAC_GMACGRP_MAC_FRAME_FILTER_ADDR(p->base_addr)); in eth_cyclonev_set_config()
335 sys_set_bits(EMAC_GMACGRP_MAC_FRAME_FILTER_ADDR(p->base_addr), in eth_cyclonev_set_config()
340 sys_clear_bits(EMAC_GMACGRP_MAC_FRAME_FILTER_ADDR(p->base_addr), in eth_cyclonev_set_config()
365 struct eth_cyclonev_priv *p = dev->data; in eth_cyclonev_caps() local
368 if (p->feature & EMAC_DMA_HW_FEATURE_MIISEL) { in eth_cyclonev_caps()
372 if (p->feature & EMAC_DMA_HW_FEATURE_GMIISEL) { in eth_cyclonev_caps()
375 if (p->feature & EMAC_DMA_HW_FEATURE_RXTYP2COE) { in eth_cyclonev_caps()
378 if (p->feature & EMAC_DMA_HW_FEATURE_RXTYP1COE) { in eth_cyclonev_caps()
402 struct eth_cyclonev_priv *p = dev->data; in eth_cyclonev_send() local
414 if (k_sem_take(&p->free_tx_descs, TX_AVAIL_WAIT) != 0) { in eth_cyclonev_send()
419 tx_desc = &p->tx_desc_ring[p->tx_current_desc_number]; in eth_cyclonev_send()
437 memcpy(&p->tx_buf[p->tx_current_desc_number * ETH_BUFFER_SIZE], frag->data, in eth_cyclonev_send()
445 p->tx_current_desc_number, in eth_cyclonev_send()
446 (unsigned int)&p->tx_desc_ring[p->tx_current_desc_number], frag->len, in eth_cyclonev_send()
461 index = p->tx_current_desc_number; in eth_cyclonev_send()
465 p->tx_current_desc_number = (p->tx_current_desc_number + 1); in eth_cyclonev_send()
466 if (p->tx_current_desc_number >= NB_TX_DESCS) { in eth_cyclonev_send()
467 p->tx_current_desc_number = 0; in eth_cyclonev_send()
474 tx_desc = &p->tx_desc_ring[index]; in eth_cyclonev_send()
482 p->base_addr), in eth_cyclonev_send()
485 p->base_addr), in eth_cyclonev_send()
487 eth_cyclonev_setup_txdesc(p); in eth_cyclonev_send()
489 p->base_addr), in eth_cyclonev_send()
509 EMAC_DMA_CURR_HOST_TX_DESC_ADDR(p->base_addr))); in eth_cyclonev_send()
512 EMAC_DMA_CURR_HOST_TX_BUFF_ADDR(p->base_addr))); in eth_cyclonev_send()
515 if (sys_read32(EMAC_DMAGRP_STATUS_ADDR(p->base_addr)) & in eth_cyclonev_send()
520 EMAC_DMAGRP_STATUS_ADDR(p->base_addr)); in eth_cyclonev_send()
524 EMAC_DMA_TX_POLL_DEMAND_ADDR(p->base_addr)); in eth_cyclonev_send()
534 k_sem_give(&p->free_tx_descs); /* Multi-descriptor package release (?) */ in eth_cyclonev_send()
549 struct eth_cyclonev_priv *p = dev->data; in eth_cyclonev_isr() local
555 sys_read32(EMAC_DMAGRP_STATUS_ADDR(p->base_addr)) & p->interrupt_mask; in eth_cyclonev_isr()
556 irq_status_emac = sys_read32(EMAC_GMAC_INT_STAT_ADDR(p->base_addr)); in eth_cyclonev_isr()
561 EMAC_DMAGRP_STATUS_ADDR(p->base_addr)); in eth_cyclonev_isr()
565 p->txints++; in eth_cyclonev_isr()
566 eth_cyclonev_tx_release(p); in eth_cyclonev_isr()
569 EMAC_DMAGRP_STATUS_ADDR(p->base_addr)); in eth_cyclonev_isr()
573 p->rxints++; in eth_cyclonev_isr()
574 eth_cyclonev_receive(p); in eth_cyclonev_isr()
577 EMAC_DMAGRP_STATUS_ADDR(p->base_addr)); in eth_cyclonev_isr()
582 uint32_t regval = sys_read32(GMACGRP_CONTROL_STATUS_ADDR(p->base_addr)); in eth_cyclonev_isr()
612 if (p->initialised) { in eth_cyclonev_isr()
615 cfg_reg_set = sys_read32(GMACGRP_MAC_CONFIG_ADDR(p->base_addr)); in eth_cyclonev_isr()
622 set_mac_conf_status(config->emac_index, &cfg_reg_set, p); in eth_cyclonev_isr()
623 sys_write32(cfg_reg_set, GMACGRP_MAC_CONFIG_ADDR(p->base_addr)); in eth_cyclonev_isr()
640 static void eth_cyclonev_receive(struct eth_cyclonev_priv *p) in eth_cyclonev_receive() argument
646 index = p->rx_current_desc_number; in eth_cyclonev_receive()
647 rx_desc = &p->rx_desc_ring[index]; in eth_cyclonev_receive()
664 rx_desc = &p->rx_desc_ring[rx_search]; in eth_cyclonev_receive()
672 rx_desc = &p->rx_desc_ring[index]; in eth_cyclonev_receive()
680 p->rx_current_desc_number = last_desc_index; in eth_cyclonev_receive()
683 pkt = net_pkt_rx_alloc_with_buffer(p->iface, frame_length, AF_UNSPEC, 0, K_NO_WAIT); in eth_cyclonev_receive()
686 eth_stats_update_errors_rx(p->iface); in eth_cyclonev_receive()
693 rx_desc = &p->rx_desc_ring[rx_search]; in eth_cyclonev_receive()
700 net_pkt_write(pkt, &p->rx_buf[rx_search * ETH_BUFFER_SIZE], in eth_cyclonev_receive()
714 rx_desc = &p->rx_desc_ring[rx_search]; in eth_cyclonev_receive()
723 &p->rx_buf[rx_search * ETH_BUFFER_SIZE], in eth_cyclonev_receive()
735 if (net_recv_data(p->iface, pkt) < 0) { in eth_cyclonev_receive()
743 p->rx_current_desc_number++; in eth_cyclonev_receive()
744 if (p->rx_current_desc_number == NB_RX_DESCS) { in eth_cyclonev_receive()
745 p->rx_current_desc_number = 0; in eth_cyclonev_receive()
747 index = p->rx_current_desc_number; in eth_cyclonev_receive()
748 rx_desc = &p->rx_desc_ring[index]; in eth_cyclonev_receive()
760 static void eth_cyclonev_tx_release(struct eth_cyclonev_priv *p) in eth_cyclonev_tx_release() argument
766 for (d_idx = p->tx_tail; d_idx != p->tx_current_desc_number; in eth_cyclonev_tx_release()
767 INC_WRAP(d_idx, NB_TX_DESCS), k_sem_give(&p->free_tx_descs)) { in eth_cyclonev_tx_release()
769 d = &p->tx_desc_ring[d_idx]; in eth_cyclonev_tx_release()
783 eth_stats_update_errors_tx(p->iface); in eth_cyclonev_tx_release()
787 p->tx_tail = d_idx; in eth_cyclonev_tx_release()
800 struct eth_cyclonev_priv *p) in set_mac_conf_status() argument
805 ret = alt_eth_phy_get_duplex_and_speed(&phy_duplex_status, &phy_speed, instance, p); in set_mac_conf_status()
853 struct eth_cyclonev_priv *p = dev->data; in eth_cyclonev_probe() local
859 p->base_addr = (mem_addr_t)config->base; in eth_cyclonev_probe()
860 p->running = 0; in eth_cyclonev_probe()
861 p->initialised = 0; in eth_cyclonev_probe()
869 ret = alt_eth_phy_reset(config->emac_index, p); in eth_cyclonev_probe()
876 ret = alt_eth_phy_config(config->emac_index, p); in eth_cyclonev_probe()
884 p->feature = sys_read32(EMAC_DMA_HW_FEATURE_ADDR(p->base_addr)); in eth_cyclonev_probe()
895 ret = eth_cyclonev_software_reset(config->emac_index, p); in eth_cyclonev_probe()
907 EMAC_DMAGRP_BUS_MODE_ADDR(p->base_addr)); in eth_cyclonev_probe()
914 tmpreg = sys_read32(EMAC_DMAGRP_AXI_BUS_MODE_ADDR(p->base_addr)); in eth_cyclonev_probe()
918 EMAC_DMAGRP_AXI_BUS_MODE_ADDR(p->base_addr)); /* Set Burst Length = 16 */ in eth_cyclonev_probe()
931 eth_cyclonev_setup_rxdesc(p); in eth_cyclonev_probe()
932 eth_cyclonev_setup_txdesc(p); in eth_cyclonev_probe()
942 EMAC_DMAGRP_OPERATION_MODE_ADDR(p->base_addr)); in eth_cyclonev_probe()
953 p->interrupt_mask = interrupt_mask; in eth_cyclonev_probe()
956 sys_write32(interrupt_mask, EMAC_DMAGRP_STATUS_ADDR(p->base_addr)); in eth_cyclonev_probe()
962 sys_set_bits(EMAC_DMA_INT_EN_ADDR(p->base_addr), interrupt_mask); in eth_cyclonev_probe()
968 if (sys_read32(EMAC_DMAGRP_AHB_OR_AXI_STATUS_ADDR(p->base_addr)) != 0) { in eth_cyclonev_probe()
997 ret = set_mac_conf_status(config->emac_index, &mac_config_reg_settings, p); in eth_cyclonev_probe()
1007 memcpy(p->mac_addr, eth_cyclonev_mac_addr, sizeof(p->mac_addr)); in eth_cyclonev_probe()
1008 eth_cyclonev_set_mac_addr(p->mac_addr, config->emac_index, 0, p); in eth_cyclonev_probe()
1018 sys_clear_bits(EMAC_GMACGRP_MAC_FRAME_FILTER_ADDR(p->base_addr), in eth_cyclonev_probe()
1025 sys_set_bits(EMAC_GMAC_INT_MSK_ADDR(p->base_addr), in eth_cyclonev_probe()
1033 sys_write32(mac_config_reg_settings, GMACGRP_MAC_CONFIG_ADDR(p->base_addr)); in eth_cyclonev_probe()
1052 struct eth_cyclonev_priv *p = dev->data; in eth_cyclonev_start() local
1054 if (p->running) { in eth_cyclonev_start()
1064 sys_set_bits(EMAC_DMAGRP_OPERATION_MODE_ADDR(p->base_addr), in eth_cyclonev_start()
1066 sys_set_bits(EMAC_DMAGRP_OPERATION_MODE_ADDR(p->base_addr), in eth_cyclonev_start()
1070 sys_set_bits(GMACGRP_MAC_CONFIG_ADDR(p->base_addr), in eth_cyclonev_start()
1072 sys_set_bits(EMAC_DMAGRP_OPERATION_MODE_ADDR(p->base_addr), in eth_cyclonev_start()
1074 sys_set_bits(GMACGRP_MAC_CONFIG_ADDR(p->base_addr), in eth_cyclonev_start()
1077 p->running = 1; in eth_cyclonev_start()
1095 struct eth_cyclonev_priv *p = dev->data; in eth_cyclonev_stop() local
1097 if (!p->running) { in eth_cyclonev_stop()
1106 sys_clear_bits(EMAC_DMAGRP_OPERATION_MODE_ADDR(p->base_addr), in eth_cyclonev_stop()
1112 sys_clear_bits(GMACGRP_MAC_CONFIG_ADDR(p->base_addr), in eth_cyclonev_stop()
1114 sys_set_bits(EMAC_DMAGRP_OPERATION_MODE_ADDR(p->base_addr), in eth_cyclonev_stop()
1116 sys_clear_bits(GMACGRP_MAC_CONFIG_ADDR(p->base_addr), in eth_cyclonev_stop()
1124 sys_clear_bits(EMAC_DMAGRP_OPERATION_MODE_ADDR(p->base_addr), in eth_cyclonev_stop()
1130 sys_read32(EMAC_DMAGRP_DEBUG_ADDR(p->base_addr))) != 0x0) { in eth_cyclonev_stop()
1134 p->running = 0; in eth_cyclonev_stop()