Lines Matching +full:spi +full:- +full:zero +full:- +full:frame

4  * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/drivers/spi.h>
17 /* SPI frequency maximum, based on clock cycle time */
34 /* Transmit Frame Check Sequence Validation Enable */
36 /* Zero Align Receive Frame Enable */
42 /* Receive Cut Through Enable. Must be 0 for Generic SPI */
83 /* Frame transmitted */
105 /*!< Mask Bit for P2_RX_RDY. Generic SPI only.*/
107 /*!< Mask Bit for SPI_ERR. Generic SPI only. */
109 /*!< Mask Bit for P1_RX_RDY. Generic SPI only.*/
111 /*!< Mask Bit for TX_FRM_DONE. Generic SPI only.*/
114 /* MAC Tx Frame Size Register */
133 /* P1 MAC Rx Frame Size Register */
138 /* P2 MAC Rx Frame Size Register */
153 /* SPI header size in bytes */
155 /* SPI header size for write transaction */
157 /* SPI header size for read transaction (1 for TA) */
160 /* SPI register write buffer size without CRC */
162 /* SPI register write buffer with appended CRC size (1 for header, 1 for register) */
165 /* SPI register read buffer size with TA without CRC */
167 /* SPI register read buffer with TA and appended CRC size (1 header, 1 for register) */
170 /* SPI read fifo cmd buffer size with TA without CRC */
172 /* SPI read fifo cmd buffer with TA and appended CRC size */
175 /* SPI Header for writing control transaction in half duplex mode */
177 /* SPI Header for writing control transaction with MAC TX register (!) in half duplex mode */
179 /* SPI Header for reading control transaction in half duplex mode */
182 /* Frame header size in bytes */
185 /* Number of buffer bytes in TxFIFO to provide frame margin upon writes */
193 /* Max setting to a max RCA of 255 68-bytes ckunks */
226 	struct spi_dt_spec spi;  member