65 	ret = eth_adin2111_reg_write(dev, ADIN2111_SOFT_RST_REG, ADIN2111_SWRESET_KEY1);  in eth_adin2111_mac_reset()
69 	ret = eth_adin2111_reg_write(dev, ADIN2111_SOFT_RST_REG, ADIN2111_SWRESET_KEY2);  in eth_adin2111_mac_reset()
73 	ret = eth_adin2111_reg_write(dev, ADIN2111_SOFT_RST_REG, ADIN2111_SWRELEASE_KEY1);  in eth_adin2111_mac_reset()
77 	ret = eth_adin2111_reg_write(dev, ADIN2111_SOFT_RST_REG, ADIN2111_SWRELEASE_KEY2);  in eth_adin2111_mac_reset()
106 	return eth_adin2111_reg_write(dev, reg, val);  in eth_adin2111_reg_update()
515 int eth_adin2111_reg_write(const struct device *dev, const uint16_t reg,  in eth_adin2111_reg_write()  function
667 		ret = eth_adin2111_reg_write(dev, ADIN2111_IMASK0, UINT32_MAX);  in adin2111_offload_thread()
671 		ret = eth_adin2111_reg_write(dev, ADIN2111_IMASK1, UINT32_MAX);  in adin2111_offload_thread()
751 		ret = eth_adin2111_reg_write(dev, ADIN2111_STATUS0, ADIN2111_STATUS0_CLEAR);  in adin2111_offload_thread()
755 		ret = eth_adin2111_reg_write(dev, ADIN2111_STATUS1, ADIN2111_STATUS1_CLEAR);  in adin2111_offload_thread()
760 		ret = eth_adin2111_reg_write(dev, ADIN2111_IMASK0, ctx->imask0);  in adin2111_offload_thread()
764 		ret = eth_adin2111_reg_write(dev, ADIN2111_IMASK1, ctx->imask1);  in adin2111_offload_thread()
907 	ret = eth_adin2111_reg_write(adin, ADIN2111_TX_FSIZE, padded_size);  in adin2111_port_send()
950 	ret = eth_adin2111_reg_write(dev, ADIN2111_CONFIG0, val);  in adin2111_config_sync()
965 	ret = eth_adin2111_reg_write(dev, ADIN2111_ADDR_FILT_UPR + offset,  in adin2111_write_filter_address()
971 	ret = eth_adin2111_reg_write(dev, ADIN2111_ADDR_FILT_LWR  + offset,  in adin2111_write_filter_address()
982 	ret = eth_adin2111_reg_write(dev, ADIN2111_ADDR_MSK_UPR + offset,  in adin2111_write_filter_address()
988 	ret = eth_adin2111_reg_write(dev, ADIN2111_ADDR_MSK_LWR + offset,  in adin2111_write_filter_address()
1323 				ret = eth_adin2111_reg_write(dev, ADIN2111_STATUS0,  in adin2111_await_device()
1341 	ret = eth_adin2111_reg_write(dev, ADIN2111_RESET, ADIN2111_RESET_SWRESET);  in eth_adin2111_sw_reset()
1449 	ret = eth_adin2111_reg_write(dev, ADIN2111_CONFIG0, val);  in adin2111_init()
1472 	ret = eth_adin2111_reg_write(dev, ADIN2111_CONFIG2, val);  in adin2111_init()
1487 	ret = eth_adin2111_reg_write(dev, ADIN2111_IMASK0, ctx->imask0);  in adin2111_init()
1492 	ret = eth_adin2111_reg_write(dev, ADIN2111_IMASK1, ctx->imask1);  in adin2111_init()