81 	ret = eth_adin2111_reg_read(dev, ADIN1110_MAC_RST_STATUS_REG, &val);  in eth_adin2111_mac_reset()
98 	ret = eth_adin2111_reg_read(dev, reg, &val);  in eth_adin2111_reg_update()
258 	ret = eth_adin2111_reg_read(dev, ADIN2111_BUFSTS, &rca);  in eth_adin2111_oa_data_read()
362 	ret = eth_adin2111_reg_read(dev, ADIN2111_BUFSTS, &txc);  in eth_adin2111_send_oa_frame()
500 int eth_adin2111_reg_read(const struct device *dev, const uint16_t reg,  in eth_adin2111_reg_read()  function
551 	ret = eth_adin2111_reg_read(dev, fsize_reg, &fsize);  in adin2111_read_fifo()
677 		ret = eth_adin2111_reg_read(dev, ADIN2111_STATUS0, &status0);  in adin2111_offload_thread()
681 		ret = eth_adin2111_reg_read(dev, ADIN2111_STATUS1, &status1);  in adin2111_offload_thread()
724 					ret = eth_adin2111_reg_read(dev, ADIN2111_STATUS1,  in adin2111_offload_thread()
740 					ret = eth_adin2111_reg_read(dev, ADIN2111_STATUS1,  in adin2111_offload_thread()
789 	ret = eth_adin2111_reg_read(dev, ADIN2111_TX_SPACE, &val);  in adin2111_read_tx_space()
824 		ret = eth_adin2111_reg_read(adin, ADIN2111_BUFSTS, &val);  in adin2111_port_send()
943 	ret = eth_adin2111_reg_read(dev, ADIN2111_CONFIG0, &val);  in adin2111_config_sync()
1060 		ret = eth_adin2111_reg_read(dev, ADIN2111_ADDR_FILT_UPR + offset, &reg);  in eth_adin2111_find_filter()
1070 			ret = eth_adin2111_reg_read(dev, ADIN2111_ADDR_FILT_LWR + offset, &reg);  in eth_adin2111_find_filter()
1100 		ret = eth_adin2111_reg_read(dev, ADIN2111_ADDR_FILT_UPR + offset, &reg);  in eth_adin2111_set_mac_filter()
1293 		ret = eth_adin2111_reg_read(dev, ADIN2111_PHYID, &val);  in adin2111_check_spi()
1314 		ret = eth_adin2111_reg_read(dev, ADIN2111_PHYID, &val);  in adin2111_await_device()
1435 	ret = eth_adin2111_reg_read(dev, ADIN2111_CONFIG0, &val);  in adin2111_init()
1456 	ret = eth_adin2111_reg_read(dev, ADIN2111_CONFIG2, &val);  in adin2111_init()