737 	struct xgmac_dma_tx_desc *tx_desc;  in eth_dwc_xgmac_tx_irq_work()  local
746 		tx_desc = (struct xgmac_dma_tx_desc *)(fisrt_tx_desc + desc_idx);  in eth_dwc_xgmac_tx_irq_work()
747 		arch_dcache_invd_range(tx_desc, sizeof(tx_desc));  in eth_dwc_xgmac_tx_irq_work()
748 		if (!(tx_desc->tdes3 & XGMAC_TDES3_OWN)) {  in eth_dwc_xgmac_tx_irq_work()
750 			if (tx_desc->tdes3 & XGMAC_TDES3_LD) {  in eth_dwc_xgmac_tx_irq_work()
761 			tx_desc->tdes0 = 0u;  in eth_dwc_xgmac_tx_irq_work()
762 			tx_desc->tdes1 = 0u;  in eth_dwc_xgmac_tx_irq_work()
763 			tx_desc->tdes2 = 0u;  in eth_dwc_xgmac_tx_irq_work()
764 			tx_desc->tdes3 = 0u;  in eth_dwc_xgmac_tx_irq_work()
765 			arch_dcache_flush_range(tx_desc, sizeof(tx_desc));  in eth_dwc_xgmac_tx_irq_work()
1405 		context.tx_desc = (struct xgmac_dma_tx_desc *)(dev_data->dma_tx_desc +  in eth_dwc_xgmac_send()
1408 		arch_dcache_invd_range(context.tx_desc, sizeof(context.tx_desc));  in eth_dwc_xgmac_send()
1410 		context.tx_desc->tdes0 = (uint32_t)POINTER_TO_UINT(frag->data);  in eth_dwc_xgmac_send()
1411 		context.tx_desc->tdes1 = (uint32_t)(POINTER_TO_UINT(frag->data) >> 32u);  in eth_dwc_xgmac_send()
1431 				(mem_addr_t)POINTER_TO_UINT(context.tx_desc + 1);  in eth_dwc_xgmac_send()
1434 		context.tx_desc->tdes2 = tdes2_flgs;  in eth_dwc_xgmac_send()
1435 		context.tx_desc->tdes3 = tdes3_flgs;  in eth_dwc_xgmac_send()
1436 		arch_dcache_flush_range(context.tx_desc, sizeof(context.tx_desc));  in eth_dwc_xgmac_send()
1465 		context.tx_desc =  in eth_dwc_xgmac_send()
1468 		context.tx_desc->tdes0 = 0u;  in eth_dwc_xgmac_send()
1469 		context.tx_desc->tdes1 = 0u;  in eth_dwc_xgmac_send()
1470 		context.tx_desc->tdes2 = 0u;  in eth_dwc_xgmac_send()
1471 		context.tx_desc->tdes3 = 0u;  in eth_dwc_xgmac_send()