283 		reg_val = DMA_CHx_TX_CONTROL2_TDRL_SET((dma_chnl_cfg->tdrl - 1u));  in dwxgmac_dma_chnl_init()
316 			POINTER_TO_UINT(data->dma_tx_desc + (dma_chnl * dma_chnl_cfg->tdrl));  in dwxgmac_dma_desc_init()
320 		       ((dma_chnl_cfg->tdrl) * sizeof(struct xgmac_dma_tx_desc)));  in dwxgmac_dma_desc_init()
721 						   uint32_t tdrl, uint16_t desc_idx)  in tx_pkt_location_in_array()  argument
723 	return (array_base + ((dma_chnl * tdrl) + desc_idx));  in tx_pkt_location_in_array()
736 		(struct xgmac_dma_tx_desc *)(data->dma_tx_desc + (dma_chnl * dma_chnl_cfg->tdrl));  in eth_dwc_xgmac_tx_irq_work()
743 		 dma_chnl_cfg->tdrl);  in eth_dwc_xgmac_tx_irq_work()
745 	     desc_idx = ((desc_idx + 1) % dma_chnl_cfg->tdrl)) {  in eth_dwc_xgmac_tx_irq_work()
752 					data->tx_pkts, dma_chnl, dma_chnl_cfg->tdrl, desc_idx));  in eth_dwc_xgmac_tx_irq_work()
757 							   dma_chnl_cfg->tdrl, desc_idx)) =  in eth_dwc_xgmac_tx_irq_work()
1089 		k_sem_init(&tx_desc_meta->free_tx_descs_sem, (dma_chnl_cfg->tdrl),  in eth_dwc_xgmac_prefill_rx_desc()
1090 			   (dma_chnl_cfg->tdrl));  in eth_dwc_xgmac_prefill_rx_desc()
1406 							       (context.q_id * dma_ch_cfg->tdrl) +  in eth_dwc_xgmac_send()
1428 			*(dev_data->tx_pkts + ((context.q_id * dma_ch_cfg->tdrl) +  in eth_dwc_xgmac_send()
1437 		context.pkt_desc_id = ((context.pkt_desc_id + 1) % dma_ch_cfg->tdrl);  in eth_dwc_xgmac_send()
1444 						 (context.q_id * dma_ch_cfg->tdrl) +  in eth_dwc_xgmac_send()
1445 						 dma_ch_cfg->tdrl))) {  in eth_dwc_xgmac_send()
1448 						     (context.q_id * dma_ch_cfg->tdrl)));  in eth_dwc_xgmac_send()
1464 	     desc_id = ((desc_id + 1) % dma_ch_cfg->tdrl)) {  in eth_dwc_xgmac_send()
1467 						     (context.q_id * dma_ch_cfg->tdrl) + desc_id);  in eth_dwc_xgmac_send()
1871 		.dma_chnl_cfg.tdrl = DT_INST_PROP(port, dma_ch_tdrl),                              \