Lines Matching refs:vw_in_tbl
151 static const struct npcx_vw_in_config vw_in_tbl[] = { variable
216 static struct miwu_callback vw_in_callback[ARRAY_SIZE(vw_in_tbl)];
653 for (idx = 0; idx < ARRAY_SIZE(vw_in_tbl); idx++) { in espi_vw_generic_isr()
654 if (wui->table == vw_in_tbl[idx].vw_wui.table && in espi_vw_generic_isr()
655 wui->group == vw_in_tbl[idx].vw_wui.group && in espi_vw_generic_isr()
656 wui->bit == vw_in_tbl[idx].vw_wui.bit) { in espi_vw_generic_isr()
661 if (idx == ARRAY_SIZE(vw_in_tbl)) { in espi_vw_generic_isr()
667 signal = vw_in_tbl[idx].sig; in espi_vw_generic_isr()
868 for (sig_idx = 0; sig_idx < ARRAY_SIZE(vw_in_tbl); sig_idx++) { in espi_npcx_receive_vwire()
869 if (vw_in_tbl[sig_idx].sig == signal) { in espi_npcx_receive_vwire()
870 reg_idx = vw_in_tbl[sig_idx].reg_idx; in espi_npcx_receive_vwire()
871 bitmask = vw_in_tbl[sig_idx].bitmask; in espi_npcx_receive_vwire()
1325 for (int idx = 0; idx < ARRAY_SIZE(vw_in_tbl); idx++) { in npcx_espi_enable_interrupts()
1326 npcx_miwu_irq_enable(&(vw_in_tbl[idx].vw_wui)); in npcx_espi_enable_interrupts()
1340 for (int idx = 0; idx < ARRAY_SIZE(vw_in_tbl); idx++) { in npcx_espi_disable_interrupts()
1341 npcx_miwu_irq_disable(&(vw_in_tbl[idx].vw_wui)); in npcx_espi_disable_interrupts()
1431 for (i = 0; i < ARRAY_SIZE(vw_in_tbl); i++) { in espi_npcx_init()
1432 espi_vw_config_input(dev, &vw_in_tbl[i]); in espi_npcx_init()
1446 for (i = 0; i < ARRAY_SIZE(vw_in_tbl); i++) { in espi_npcx_init()
1448 &vw_in_tbl[i].vw_wui, espi_vw_generic_isr); in espi_npcx_init()