46 static void dma_stm32_dump_stream_irq(const struct device *dev, uint32_t id)  in dma_stm32_dump_stream_irq()  argument
51 	stm32_dma_dump_stream_irq(dma, id);  in dma_stm32_dump_stream_irq()
54 static void dma_stm32_clear_stream_irq(const struct device *dev, uint32_t id)  in dma_stm32_clear_stream_irq()  argument
59 	dma_stm32_clear_tc(dma, id);  in dma_stm32_clear_stream_irq()
60 	dma_stm32_clear_ht(dma, id);  in dma_stm32_clear_stream_irq()
61 	stm32_dma_clear_stream_irq(dma, id);  in dma_stm32_clear_stream_irq()
65 uint32_t dma_stm32_id_to_stream(uint32_t id)  in dma_stm32_id_to_stream()  argument
86 	__ASSERT_NO_MSG(id < ARRAY_SIZE(stream_nr));  in dma_stm32_id_to_stream()
88 	return stream_nr[id];  in dma_stm32_id_to_stream()
91 bool dma_stm32_is_tc_active(DMA_TypeDef *DMAx, uint32_t id)  in dma_stm32_is_tc_active()  argument
93 	return LL_DMA_IsActiveFlag_TC(DMAx, dma_stm32_id_to_stream(id));  in dma_stm32_is_tc_active()
96 void dma_stm32_clear_tc(DMA_TypeDef *DMAx, uint32_t id)  in dma_stm32_clear_tc()  argument
98 	LL_DMA_ClearFlag_TC(DMAx, dma_stm32_id_to_stream(id));  in dma_stm32_clear_tc()
102 static inline bool dma_stm32_is_dte_active(DMA_TypeDef *dma, uint32_t id)  in dma_stm32_is_dte_active()  argument
104 	return LL_DMA_IsActiveFlag_DTE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_is_dte_active()
108 static inline bool dma_stm32_is_ule_active(DMA_TypeDef *dma, uint32_t id)  in dma_stm32_is_ule_active()  argument
110 	return LL_DMA_IsActiveFlag_ULE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_is_ule_active()
114 static inline bool dma_stm32_is_use_active(DMA_TypeDef *dma, uint32_t id)  in dma_stm32_is_use_active()  argument
116 	return LL_DMA_IsActiveFlag_USE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_is_use_active()
120 bool dma_stm32_is_te_active(DMA_TypeDef *DMAx, uint32_t id)  in dma_stm32_is_te_active()  argument
123 	LL_DMA_IsActiveFlag_DTE(DMAx, dma_stm32_id_to_stream(id)) ||  in dma_stm32_is_te_active()
124 		LL_DMA_IsActiveFlag_ULE(DMAx, dma_stm32_id_to_stream(id)) ||  in dma_stm32_is_te_active()
125 		LL_DMA_IsActiveFlag_USE(DMAx, dma_stm32_id_to_stream(id))  in dma_stm32_is_te_active()
129 void dma_stm32_clear_te(DMA_TypeDef *DMAx, uint32_t id)  in dma_stm32_clear_te()  argument
131 	LL_DMA_ClearFlag_DTE(DMAx, dma_stm32_id_to_stream(id));  in dma_stm32_clear_te()
132 	LL_DMA_ClearFlag_ULE(DMAx, dma_stm32_id_to_stream(id));  in dma_stm32_clear_te()
133 	LL_DMA_ClearFlag_USE(DMAx, dma_stm32_id_to_stream(id));  in dma_stm32_clear_te()
136 bool dma_stm32_is_ht_active(DMA_TypeDef *DMAx, uint32_t id)  in dma_stm32_is_ht_active()  argument
138 	return LL_DMA_IsActiveFlag_HT(DMAx, dma_stm32_id_to_stream(id));  in dma_stm32_is_ht_active()
141 void dma_stm32_clear_ht(DMA_TypeDef *DMAx, uint32_t id)  in dma_stm32_clear_ht()  argument
143 	LL_DMA_ClearFlag_HT(DMAx, dma_stm32_id_to_stream(id));  in dma_stm32_clear_ht()
146 void stm32_dma_dump_stream_irq(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_dump_stream_irq()  argument
149 		dma_stm32_is_tc_active(dma, id),  in stm32_dma_dump_stream_irq()
150 		dma_stm32_is_ht_active(dma, id),  in stm32_dma_dump_stream_irq()
151 		dma_stm32_is_dte_active(dma, id),  in stm32_dma_dump_stream_irq()
152 		dma_stm32_is_ule_active(dma, id),  in stm32_dma_dump_stream_irq()
153 		dma_stm32_is_use_active(dma, id)  in stm32_dma_dump_stream_irq()
158 bool stm32_dma_is_tc_irq_active(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_is_tc_irq_active()  argument
160 	return (LL_DMA_IsEnabledIT_TC(dma, dma_stm32_id_to_stream(id)) &&  in stm32_dma_is_tc_irq_active()
161 		LL_DMA_IsActiveFlag_TC(dma, dma_stm32_id_to_stream(id)));  in stm32_dma_is_tc_irq_active()
164 bool stm32_dma_is_ht_irq_active(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_is_ht_irq_active()  argument
166 	return (LL_DMA_IsEnabledIT_HT(dma, dma_stm32_id_to_stream(id)) &&  in stm32_dma_is_ht_irq_active()
167 		LL_DMA_IsActiveFlag_HT(dma, dma_stm32_id_to_stream(id)));  in stm32_dma_is_ht_irq_active()
170 static inline bool stm32_dma_is_te_irq_active(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_is_te_irq_active()  argument
173 		(LL_DMA_IsEnabledIT_DTE(dma, dma_stm32_id_to_stream(id)) &&  in stm32_dma_is_te_irq_active()
174 		LL_DMA_IsActiveFlag_DTE(dma, dma_stm32_id_to_stream(id))) ||  in stm32_dma_is_te_irq_active()
175 		(LL_DMA_IsEnabledIT_ULE(dma, dma_stm32_id_to_stream(id)) &&  in stm32_dma_is_te_irq_active()
176 		LL_DMA_IsActiveFlag_ULE(dma, dma_stm32_id_to_stream(id))) ||  in stm32_dma_is_te_irq_active()
177 		(LL_DMA_IsEnabledIT_USE(dma, dma_stm32_id_to_stream(id)) &&  in stm32_dma_is_te_irq_active()
178 		LL_DMA_IsActiveFlag_USE(dma, dma_stm32_id_to_stream(id)))  in stm32_dma_is_te_irq_active()
185 void stm32_dma_clear_stream_irq(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_clear_stream_irq()  argument
187 	dma_stm32_clear_te(dma, id);  in stm32_dma_clear_stream_irq()
189 	LL_DMA_ClearFlag_TO(dma, dma_stm32_id_to_stream(id));  in stm32_dma_clear_stream_irq()
190 	LL_DMA_ClearFlag_SUSP(dma, dma_stm32_id_to_stream(id));  in stm32_dma_clear_stream_irq()
193 bool stm32_dma_is_irq_happened(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_is_irq_happened()  argument
195 	if (dma_stm32_is_te_active(dma, id)) {  in stm32_dma_is_irq_happened()
202 void stm32_dma_enable_stream(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_enable_stream()  argument
204 	LL_DMA_EnableChannel(dma, dma_stm32_id_to_stream(id));  in stm32_dma_enable_stream()
207 bool stm32_dma_is_enabled_stream(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_is_enabled_stream()  argument
209 	if (LL_DMA_IsEnabledChannel(dma, dma_stm32_id_to_stream(id)) == 1) {  in stm32_dma_is_enabled_stream()
215 int stm32_dma_disable_stream(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_disable_stream()  argument
218 	LL_DMA_SuspendChannel(dma, dma_stm32_id_to_stream(id));  in stm32_dma_disable_stream()
221 	LL_DMA_ResetChannel(dma, dma_stm32_id_to_stream(id));  in stm32_dma_disable_stream()
223 	if (!stm32_dma_is_enabled_stream(dma, id)) {  in stm32_dma_disable_stream()
247 static void dma_stm32_irq_handler(const struct device *dev, uint32_t id)  in dma_stm32_irq_handler()  argument
254 	__ASSERT_NO_MSG(id < config->max_streams);  in dma_stm32_irq_handler()
256 	stream = &config->streams[id];  in dma_stm32_irq_handler()
263 		dma_stm32_clear_stream_irq(dev, id);  in dma_stm32_irq_handler()
266 	callback_arg = id + STM32_DMA_STREAM_OFFSET;  in dma_stm32_irq_handler()
269 	if (stm32_dma_is_ht_irq_active(dma, id)) {  in dma_stm32_irq_handler()
272 			dma_stm32_clear_ht(dma, id);  in dma_stm32_irq_handler()
275 	} else if (stm32_dma_is_tc_irq_active(dma, id)) {  in dma_stm32_irq_handler()
280 			dma_stm32_clear_tc(dma, id);  in dma_stm32_irq_handler()
286 		dma_stm32_dump_stream_irq(dev, id);  in dma_stm32_irq_handler()
287 		dma_stm32_clear_stream_irq(dev, id);  in dma_stm32_irq_handler()
325 static int dma_stm32_disable_stream(DMA_TypeDef *dma, uint32_t id)  in dma_stm32_disable_stream()  argument
330 		if (stm32_dma_disable_stream(dma, id) == 0) {  in dma_stm32_disable_stream()
344 					     uint32_t id,  in dma_stm32_configure()  argument
349 				&dev_config->streams[id - STM32_DMA_STREAM_OFFSET];  in dma_stm32_configure()
357 	id = id - STM32_DMA_STREAM_OFFSET;  in dma_stm32_configure()
359 	if (id >= dev_config->max_streams) {  in dma_stm32_configure()
360 		LOG_ERR("cannot configure the dma stream %d.", id);  in dma_stm32_configure()
365 		LOG_ERR("dma stream %d is busy.", id);  in dma_stm32_configure()
369 	if (dma_stm32_disable_stream(dma, id) != 0) {  in dma_stm32_configure()
370 		LOG_ERR("could not disable dma stream %d.", id);  in dma_stm32_configure()
374 	dma_stm32_clear_stream_irq(dev, id);  in dma_stm32_configure()
468 				id, DMA_InitStruct.SrcIncMode);  in dma_stm32_configure()
486 				id, DMA_InitStruct.DestIncMode);  in dma_stm32_configure()
503 	LL_DMA_Init(dma, dma_stm32_id_to_stream(id), &DMA_InitStruct);  in dma_stm32_configure()
505 	LL_DMA_EnableIT_TC(dma, dma_stm32_id_to_stream(id));  in dma_stm32_configure()
506 	LL_DMA_EnableIT_USE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_configure()
507 	LL_DMA_EnableIT_ULE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_configure()
508 	LL_DMA_EnableIT_DTE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_configure()
512 		LL_DMA_EnableIT_HT(dma, dma_stm32_id_to_stream(id));  in dma_stm32_configure()
518 static int dma_stm32_reload(const struct device *dev, uint32_t id,  in dma_stm32_reload()  argument
527 	id = id - STM32_DMA_STREAM_OFFSET;  in dma_stm32_reload()
529 	if (id >= config->max_streams) {  in dma_stm32_reload()
533 	stream = &config->streams[id];  in dma_stm32_reload()
535 	if (dma_stm32_disable_stream(dma, id) != 0) {  in dma_stm32_reload()
544 				dma_stm32_id_to_stream(id),  in dma_stm32_reload()
547 	LL_DMA_SetBlkDataLength(dma, dma_stm32_id_to_stream(id), size);  in dma_stm32_reload()
552 	stm32_dma_enable_stream(dma, id);  in dma_stm32_reload()
557 static int dma_stm32_start(const struct device *dev, uint32_t id)  in dma_stm32_start()  argument
564 	id = id - STM32_DMA_STREAM_OFFSET;  in dma_stm32_start()
567 	if (id >= config->max_streams) {  in dma_stm32_start()
572 	if (stm32_dma_is_enabled_stream(dma, id)) {  in dma_stm32_start()
577 	stream = &config->streams[id];  in dma_stm32_start()
580 	dma_stm32_clear_stream_irq(dev, id);  in dma_stm32_start()
582 	stm32_dma_enable_stream(dma, id);  in dma_stm32_start()
587 static int dma_stm32_suspend(const struct device *dev, uint32_t id)  in dma_stm32_suspend()  argument
593 	id = id - STM32_DMA_STREAM_OFFSET;  in dma_stm32_suspend()
595 	if (id >= config->max_streams) {  in dma_stm32_suspend()
600 	LL_DMA_SuspendChannel(dma, dma_stm32_id_to_stream(id));  in dma_stm32_suspend()
604 	} while (LL_DMA_IsActiveFlag_SUSP(dma, dma_stm32_id_to_stream(id)) != 1);  in dma_stm32_suspend()
610 static int dma_stm32_resume(const struct device *dev, uint32_t id)  in dma_stm32_resume()  argument
616 	id = id - STM32_DMA_STREAM_OFFSET;  in dma_stm32_resume()
618 	if (id >= config->max_streams) {  in dma_stm32_resume()
623 	LL_DMA_ResumeChannel(dma, dma_stm32_id_to_stream(id));  in dma_stm32_resume()
628 static int dma_stm32_stop(const struct device *dev, uint32_t id)  in dma_stm32_stop()  argument
631 	struct dma_stm32_stream *stream = &config->streams[id - STM32_DMA_STREAM_OFFSET];  in dma_stm32_stop()
635 	id = id - STM32_DMA_STREAM_OFFSET;  in dma_stm32_stop()
637 	if (id >= config->max_streams) {  in dma_stm32_stop()
647 	if (!stm32_dma_is_enabled_stream(dma, id)) {  in dma_stm32_stop()
651 	LL_DMA_DisableIT_TC(dma, dma_stm32_id_to_stream(id));  in dma_stm32_stop()
652 	LL_DMA_DisableIT_USE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_stop()
653 	LL_DMA_DisableIT_ULE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_stop()
654 	LL_DMA_DisableIT_DTE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_stop()
656 	dma_stm32_clear_stream_irq(dev, id);  in dma_stm32_stop()
657 	dma_stm32_disable_stream(dma, id);  in dma_stm32_stop()
690 				uint32_t id, struct dma_status *stat)  in dma_stm32_get_status()  argument
697 	id = id - STM32_DMA_STREAM_OFFSET;  in dma_stm32_get_status()
698 	if (id >= config->max_streams) {  in dma_stm32_get_status()
702 	stream = &config->streams[id];  in dma_stm32_get_status()
703 	stat->pending_length = LL_DMA_GetBlkDataLength(dma, dma_stm32_id_to_stream(id));  in dma_stm32_get_status()