Lines Matching +full:stream +full:- +full:mode
6 * SPDX-License-Identifier: Apache-2.0
48 const struct dma_stm32_config *config = dev->config; in dma_stm32_dump_stream_irq()
49 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_dump_stream_irq()
56 const struct dma_stm32_config *config = dev->config; in dma_stm32_clear_stream_irq()
57 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_clear_stream_irq()
227 return -EAGAIN; in stm32_dma_disable_stream()
249 const struct dma_stm32_config *config = dev->config; in dma_stm32_irq_handler()
250 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_irq_handler()
251 struct dma_stm32_stream *stream; in dma_stm32_irq_handler() local
254 __ASSERT_NO_MSG(id < config->max_streams); in dma_stm32_irq_handler()
256 stream = &config->streams[id]; in dma_stm32_irq_handler()
258 if ((stream->hal_override != true) && (stream->busy == false)) { in dma_stm32_irq_handler()
268 /* The dma stream id is in range from STM32_DMA_STREAM_OFFSET..<dma-requests> */ in dma_stm32_irq_handler()
271 if (!stream->hal_override) { in dma_stm32_irq_handler()
274 stream->dma_callback(dev, stream->user_data, callback_arg, DMA_STATUS_BLOCK); in dma_stm32_irq_handler()
277 if (stream->cyclic == false) { in dma_stm32_irq_handler()
278 stream->busy = false; in dma_stm32_irq_handler()
281 if (!stream->hal_override) { in dma_stm32_irq_handler()
284 stream->dma_callback(dev, stream->user_data, callback_arg, DMA_STATUS_COMPLETE); in dma_stm32_irq_handler()
287 stream->busy = false; in dma_stm32_irq_handler()
290 stream->dma_callback(dev, stream->user_data, in dma_stm32_irq_handler()
291 callback_arg, -EIO); in dma_stm32_irq_handler()
299 return -EINVAL; in dma_stm32_get_priority()
321 return -EINVAL; in dma_stm32_get_direction()
337 return -EBUSY; in dma_stm32_disable_stream()
349 const struct dma_stm32_config *dev_config = dev->config; in dma_stm32_configure()
350 struct dma_stm32_stream *stream = in dma_stm32_configure() local
351 &dev_config->streams[id - STM32_DMA_STREAM_OFFSET]; in dma_stm32_configure()
352 DMA_TypeDef *dma = (DMA_TypeDef *)dev_config->base; in dma_stm32_configure()
366 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_configure()
368 if (id >= dev_config->max_streams) { in dma_stm32_configure()
369 LOG_ERR("cannot configure the dma stream %d.", id); in dma_stm32_configure()
370 return -EINVAL; in dma_stm32_configure()
373 if (stream->busy) { in dma_stm32_configure()
374 LOG_ERR("dma stream %d is busy.", id); in dma_stm32_configure()
375 return -EBUSY; in dma_stm32_configure()
379 LOG_ERR("could not disable dma stream %d.", id); in dma_stm32_configure()
380 return -EBUSY; in dma_stm32_configure()
385 /* Check potential DMA override (if id parameters and stream are valid) */ in dma_stm32_configure()
386 if (config->linked_channel == STM32_DMA_HAL_OVERRIDE) { in dma_stm32_configure()
391 stream->busy = true; in dma_stm32_configure()
392 stream->hal_override = true; in dma_stm32_configure()
393 stream->dma_callback = config->dma_callback; in dma_stm32_configure()
394 stream->user_data = config->user_data; in dma_stm32_configure()
398 if (config->head_block->block_size > DMA_STM32_MAX_DATA_ITEMS) { in dma_stm32_configure()
400 config->head_block->block_size); in dma_stm32_configure()
401 return -EINVAL; in dma_stm32_configure()
405 if (config->dest_data_size != config->source_data_size) { in dma_stm32_configure()
407 return -EINVAL; in dma_stm32_configure()
410 if (config->source_data_size != 4U && in dma_stm32_configure()
411 config->source_data_size != 2U && in dma_stm32_configure()
412 config->source_data_size != 1U) { in dma_stm32_configure()
414 config->source_data_size); in dma_stm32_configure()
415 return -EINVAL; in dma_stm32_configure()
418 stream->busy = true; in dma_stm32_configure()
419 stream->dma_callback = config->dma_callback; in dma_stm32_configure()
420 stream->direction = config->channel_direction; in dma_stm32_configure()
421 stream->user_data = config->user_data; in dma_stm32_configure()
422 stream->src_size = config->source_data_size; in dma_stm32_configure()
423 stream->dst_size = config->dest_data_size; in dma_stm32_configure()
426 if (config->head_block->source_address == 0) { in dma_stm32_configure()
430 if (config->head_block->dest_address == 0) { in dma_stm32_configure()
434 DMA_InitStruct.SrcAddress = config->head_block->source_address; in dma_stm32_configure()
435 DMA_InitStruct.DestAddress = config->head_block->dest_address; in dma_stm32_configure()
436 NodeConfig.SrcAddress = config->head_block->source_address; in dma_stm32_configure()
437 NodeConfig.DestAddress = config->head_block->dest_address; in dma_stm32_configure()
438 NodeConfig.BlkDataLength = config->head_block->block_size; in dma_stm32_configure()
440 ret = dma_stm32_get_priority(config->channel_priority, in dma_stm32_configure()
446 ret = dma_stm32_get_direction(config->channel_direction, in dma_stm32_configure()
453 switch (config->head_block->source_addr_adj) { in dma_stm32_configure()
461 return -ENOTSUP; in dma_stm32_configure()
464 config->head_block->source_addr_adj); in dma_stm32_configure()
465 return -EINVAL; in dma_stm32_configure()
471 switch (config->head_block->dest_addr_adj) { in dma_stm32_configure()
479 return -ENOTSUP; in dma_stm32_configure()
482 config->head_block->dest_addr_adj); in dma_stm32_configure()
483 return -EINVAL; in dma_stm32_configure()
488 stream->source_periph = (stream->direction == PERIPHERAL_TO_MEMORY); in dma_stm32_configure()
491 int index = find_lsb_set(config->source_data_size) - 1; in dma_stm32_configure()
495 index = find_lsb_set(config->dest_data_size) - 1; in dma_stm32_configure()
498 DMA_InitStruct.BlkDataLength = config->head_block->block_size; in dma_stm32_configure()
501 DMA_InitStruct.Request = config->dma_slot; in dma_stm32_configure()
503 if (config->head_block->source_reload_en == 0) { in dma_stm32_configure()
504 /* Initialize the DMA structure in non-cyclic mode only */ in dma_stm32_configure()
506 } else {/* cyclic mode */ in dma_stm32_configure()
516 stream->cyclic = true; in dma_stm32_configure()
550 const struct dma_stm32_config *config = dev->config; in dma_stm32_reload()
551 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_reload()
552 struct dma_stm32_stream *stream; in dma_stm32_reload() local
555 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_reload()
557 if (id >= config->max_streams) { in dma_stm32_reload()
558 return -EINVAL; in dma_stm32_reload()
561 stream = &config->streams[id]; in dma_stm32_reload()
564 return -EBUSY; in dma_stm32_reload()
567 if (stream->direction > PERIPHERAL_TO_MEMORY) { in dma_stm32_reload()
568 return -EINVAL; in dma_stm32_reload()
577 /* When reloading the dma, the stream is busy again before enabling */ in dma_stm32_reload()
578 stream->busy = true; in dma_stm32_reload()
587 const struct dma_stm32_config *config = dev->config; in dma_stm32_start()
588 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_start()
589 struct dma_stm32_stream *stream; in dma_stm32_start() local
592 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_start()
594 /* Only M2P or M2M mode can be started manually. */ in dma_stm32_start()
595 if (id >= config->max_streams) { in dma_stm32_start()
596 return -EINVAL; in dma_stm32_start()
604 /* When starting the dma, the stream is busy before enabling */ in dma_stm32_start()
605 stream = &config->streams[id]; in dma_stm32_start()
606 stream->busy = true; in dma_stm32_start()
617 const struct dma_stm32_config *config = dev->config; in dma_stm32_suspend()
618 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_suspend()
621 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_suspend()
623 if (id >= config->max_streams) { in dma_stm32_suspend()
624 return -EINVAL; in dma_stm32_suspend()
640 const struct dma_stm32_config *config = dev->config; in dma_stm32_resume()
641 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_resume()
644 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_resume()
646 if (id >= config->max_streams) { in dma_stm32_resume()
647 return -EINVAL; in dma_stm32_resume()
658 const struct dma_stm32_config *config = dev->config; in dma_stm32_stop()
659 struct dma_stm32_stream *stream = &config->streams[id - STM32_DMA_STREAM_OFFSET]; in dma_stm32_stop() local
660 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_stop()
663 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_stop()
665 if (id >= config->max_streams) { in dma_stm32_stop()
666 return -EINVAL; in dma_stm32_stop()
669 if (stream->hal_override) { in dma_stm32_stop()
670 stream->busy = false; in dma_stm32_stop()
687 /* Finally, flag stream as free */ in dma_stm32_stop()
688 stream->busy = false; in dma_stm32_stop()
695 const struct dma_stm32_config *config = dev->config; in dma_stm32_init()
699 (clock_control_subsys_t) &config->pclken) != 0) { in dma_stm32_init()
701 return -EIO; in dma_stm32_init()
704 config->config_irq(dev); in dma_stm32_init()
706 for (uint32_t i = 0; i < config->max_streams; i++) { in dma_stm32_init()
707 config->streams[i].busy = false; in dma_stm32_init()
710 ((struct dma_stm32_data *)dev->data)->dma_ctx.magic = 0; in dma_stm32_init()
711 ((struct dma_stm32_data *)dev->data)->dma_ctx.dma_channels = 0; in dma_stm32_init()
712 ((struct dma_stm32_data *)dev->data)->dma_ctx.atomic = 0; in dma_stm32_init()
720 const struct dma_stm32_config *config = dev->config; in dma_stm32_get_status()
721 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_get_status()
722 struct dma_stm32_stream *stream; in dma_stm32_get_status() local
725 id = id - STM32_DMA_STREAM_OFFSET; in dma_stm32_get_status()
726 if (id >= config->max_streams) { in dma_stm32_get_status()
727 return -EINVAL; in dma_stm32_get_status()
730 stream = &config->streams[id]; in dma_stm32_get_status()
731 stat->pending_length = LL_DMA_GetBlkDataLength(dma, dma_stm32_id_to_stream(id)); in dma_stm32_get_status()
732 stat->dir = stream->direction; in dma_stm32_get_status()
733 stat->busy = stream->busy; in dma_stm32_get_status()