10  * @brief Common part of DMA drivers for stm32U5.
19 #include <zephyr/drivers/dma/dma_stm32.h>
49 	DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);  in dma_stm32_dump_stream_irq()  local
51 	stm32_dma_dump_stream_irq(dma, id);  in dma_stm32_dump_stream_irq()
57 	DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);  in dma_stm32_clear_stream_irq()  local
59 	dma_stm32_clear_tc(dma, id);  in dma_stm32_clear_stream_irq()
60 	dma_stm32_clear_ht(dma, id);  in dma_stm32_clear_stream_irq()
61 	stm32_dma_clear_stream_irq(dma, id);  in dma_stm32_clear_stream_irq()
102 static inline bool dma_stm32_is_dte_active(DMA_TypeDef *dma, uint32_t id)  in dma_stm32_is_dte_active()  argument
104 	return LL_DMA_IsActiveFlag_DTE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_is_dte_active()
108 static inline bool dma_stm32_is_ule_active(DMA_TypeDef *dma, uint32_t id)  in dma_stm32_is_ule_active()  argument
110 	return LL_DMA_IsActiveFlag_ULE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_is_ule_active()
114 static inline bool dma_stm32_is_use_active(DMA_TypeDef *dma, uint32_t id)  in dma_stm32_is_use_active()  argument
116 	return LL_DMA_IsActiveFlag_USE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_is_use_active()
146 void stm32_dma_dump_stream_irq(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_dump_stream_irq()  argument
149 		dma_stm32_is_tc_active(dma, id),  in stm32_dma_dump_stream_irq()
150 		dma_stm32_is_ht_active(dma, id),  in stm32_dma_dump_stream_irq()
151 		dma_stm32_is_dte_active(dma, id),  in stm32_dma_dump_stream_irq()
152 		dma_stm32_is_ule_active(dma, id),  in stm32_dma_dump_stream_irq()
153 		dma_stm32_is_use_active(dma, id)  in stm32_dma_dump_stream_irq()
158 bool stm32_dma_is_tc_irq_active(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_is_tc_irq_active()  argument
160 	return (LL_DMA_IsEnabledIT_TC(dma, dma_stm32_id_to_stream(id)) &&  in stm32_dma_is_tc_irq_active()
161 		LL_DMA_IsActiveFlag_TC(dma, dma_stm32_id_to_stream(id)));  in stm32_dma_is_tc_irq_active()
164 bool stm32_dma_is_ht_irq_active(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_is_ht_irq_active()  argument
166 	return (LL_DMA_IsEnabledIT_HT(dma, dma_stm32_id_to_stream(id)) &&  in stm32_dma_is_ht_irq_active()
167 		LL_DMA_IsActiveFlag_HT(dma, dma_stm32_id_to_stream(id)));  in stm32_dma_is_ht_irq_active()
170 static inline bool stm32_dma_is_te_irq_active(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_is_te_irq_active()  argument
173 		(LL_DMA_IsEnabledIT_DTE(dma, dma_stm32_id_to_stream(id)) &&  in stm32_dma_is_te_irq_active()
174 		LL_DMA_IsActiveFlag_DTE(dma, dma_stm32_id_to_stream(id))) ||  in stm32_dma_is_te_irq_active()
175 		(LL_DMA_IsEnabledIT_ULE(dma, dma_stm32_id_to_stream(id)) &&  in stm32_dma_is_te_irq_active()
176 		LL_DMA_IsActiveFlag_ULE(dma, dma_stm32_id_to_stream(id))) ||  in stm32_dma_is_te_irq_active()
177 		(LL_DMA_IsEnabledIT_USE(dma, dma_stm32_id_to_stream(id)) &&  in stm32_dma_is_te_irq_active()
178 		LL_DMA_IsActiveFlag_USE(dma, dma_stm32_id_to_stream(id)))  in stm32_dma_is_te_irq_active()
185 void stm32_dma_clear_stream_irq(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_clear_stream_irq()  argument
187 	dma_stm32_clear_te(dma, id);  in stm32_dma_clear_stream_irq()
189 	LL_DMA_ClearFlag_TO(dma, dma_stm32_id_to_stream(id));  in stm32_dma_clear_stream_irq()
190 	LL_DMA_ClearFlag_SUSP(dma, dma_stm32_id_to_stream(id));  in stm32_dma_clear_stream_irq()
193 bool stm32_dma_is_irq_happened(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_is_irq_happened()  argument
195 	if (dma_stm32_is_te_active(dma, id)) {  in stm32_dma_is_irq_happened()
202 void stm32_dma_enable_stream(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_enable_stream()  argument
204 	LL_DMA_EnableChannel(dma, dma_stm32_id_to_stream(id));  in stm32_dma_enable_stream()
207 bool stm32_dma_is_enabled_stream(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_is_enabled_stream()  argument
209 	if (LL_DMA_IsEnabledChannel(dma, dma_stm32_id_to_stream(id)) == 1) {  in stm32_dma_is_enabled_stream()
215 int stm32_dma_disable_stream(DMA_TypeDef *dma, uint32_t id)  in stm32_dma_disable_stream()  argument
218 	LL_DMA_SuspendChannel(dma, dma_stm32_id_to_stream(id));  in stm32_dma_disable_stream()
221 	LL_DMA_ResetChannel(dma, dma_stm32_id_to_stream(id));  in stm32_dma_disable_stream()
223 	if (!stm32_dma_is_enabled_stream(dma, id)) {  in stm32_dma_disable_stream()
230 void stm32_dma_set_mem_periph_address(DMA_TypeDef *dma,  in stm32_dma_set_mem_periph_address()  argument
235 	LL_DMA_ConfigAddresses(dma, channel, src_addr, dest_addr);  in stm32_dma_set_mem_periph_address()
239 void stm32_dma_set_periph_mem_address(DMA_TypeDef *dma,  in stm32_dma_set_periph_mem_address()  argument
244 	LL_DMA_ConfigAddresses(dma, channel, src_addr, dest_addr);  in stm32_dma_set_periph_mem_address()
250 	DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);  in dma_stm32_irq_handler()  local
260 		 * When DMA channel is not overridden by HAL,  in dma_stm32_irq_handler()
268 	/* The dma stream id is in range from STM32_DMA_STREAM_OFFSET..<dma-requests> */  in dma_stm32_irq_handler()
269 	if (stm32_dma_is_ht_irq_active(dma, id)) {  in dma_stm32_irq_handler()
270 		/* Let HAL DMA handle flags on its own */  in dma_stm32_irq_handler()
272 			dma_stm32_clear_ht(dma, id);  in dma_stm32_irq_handler()
275 	} else if (stm32_dma_is_tc_irq_active(dma, id)) {  in dma_stm32_irq_handler()
278 		/* Let HAL DMA handle flags on its own */  in dma_stm32_irq_handler()
280 			dma_stm32_clear_tc(dma, id);  in dma_stm32_irq_handler()
325 static int dma_stm32_disable_stream(DMA_TypeDef *dma, uint32_t id)  in dma_stm32_disable_stream()  argument
330 		if (stm32_dma_disable_stream(dma, id) == 0) {  in dma_stm32_disable_stream()
350 	DMA_TypeDef *dma = (DMA_TypeDef *)dev_config->base;  in dma_stm32_configure()  local
360 		LOG_ERR("cannot configure the dma stream %d.", id);  in dma_stm32_configure()
365 		LOG_ERR("dma stream %d is busy.", id);  in dma_stm32_configure()
369 	if (dma_stm32_disable_stream(dma, id) != 0) {  in dma_stm32_configure()
370 		LOG_ERR("could not disable dma stream %d.", id);  in dma_stm32_configure()
376 	/* Check potential DMA override (if id parameters and stream are valid) */  in dma_stm32_configure()
378 		/* DMA channel is overridden by HAL DMA  in dma_stm32_configure()
503 	LL_DMA_Init(dma, dma_stm32_id_to_stream(id), &DMA_InitStruct);  in dma_stm32_configure()
505 	LL_DMA_EnableIT_TC(dma, dma_stm32_id_to_stream(id));  in dma_stm32_configure()
506 	LL_DMA_EnableIT_USE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_configure()
507 	LL_DMA_EnableIT_ULE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_configure()
508 	LL_DMA_EnableIT_DTE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_configure()
512 		LL_DMA_EnableIT_HT(dma, dma_stm32_id_to_stream(id));  in dma_stm32_configure()
523 	DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);  in dma_stm32_reload()  local
535 	if (dma_stm32_disable_stream(dma, id) != 0) {  in dma_stm32_reload()
543 	LL_DMA_ConfigAddresses(dma,  in dma_stm32_reload()
547 	LL_DMA_SetBlkDataLength(dma, dma_stm32_id_to_stream(id), size);  in dma_stm32_reload()
549 	/* When reloading the dma, the stream is busy again before enabling */  in dma_stm32_reload()
552 	stm32_dma_enable_stream(dma, id);  in dma_stm32_reload()
560 	DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);  in dma_stm32_start()  local
572 	if (stm32_dma_is_enabled_stream(dma, id)) {  in dma_stm32_start()
576 	/* When starting the dma, the stream is busy before enabling */  in dma_stm32_start()
582 	stm32_dma_enable_stream(dma, id);  in dma_stm32_start()
590 	DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);  in dma_stm32_suspend()  local
600 	LL_DMA_SuspendChannel(dma, dma_stm32_id_to_stream(id));  in dma_stm32_suspend()
604 	} while (LL_DMA_IsActiveFlag_SUSP(dma, dma_stm32_id_to_stream(id)) != 1);  in dma_stm32_suspend()
613 	DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);  in dma_stm32_resume()  local
623 	LL_DMA_ResumeChannel(dma, dma_stm32_id_to_stream(id));  in dma_stm32_resume()
632 	DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);  in dma_stm32_stop()  local
647 	if (!stm32_dma_is_enabled_stream(dma, id)) {  in dma_stm32_stop()
651 	LL_DMA_DisableIT_TC(dma, dma_stm32_id_to_stream(id));  in dma_stm32_stop()
652 	LL_DMA_DisableIT_USE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_stop()
653 	LL_DMA_DisableIT_ULE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_stop()
654 	LL_DMA_DisableIT_DTE(dma, dma_stm32_id_to_stream(id));  in dma_stm32_stop()
657 	dma_stm32_disable_stream(dma, id);  in dma_stm32_stop()
693 	DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);  in dma_stm32_get_status()  local
703 	stat->pending_length = LL_DMA_GetBlkDataLength(dma, dma_stm32_id_to_stream(id));  in dma_stm32_get_status()
710 static DEVICE_API(dma, dma_funcs) = {
722  * chan: channel of the DMA instance (assuming one irq per channel)
724  * dma : dma instance (one GPDMA instance on stm32U5x)
726 #define DMA_STM32_IRQ_CONNECT_CHANNEL(chan, dma)			\  argument
728 		IRQ_CONNECT(DT_INST_IRQ_BY_IDX(dma, chan, irq),		\
729 			    DT_INST_IRQ_BY_IDX(dma, chan, priority),	\
730 			    dma_stm32_irq_##dma##_##chan,		\
731 			    DEVICE_DT_INST_GET(dma), 0);		\
732 		irq_enable(DT_INST_IRQ_BY_IDX(dma, chan, irq));		\
736  * Macro to configure the irq for each dma instance (index)
751  * chan: channel of the DMA instance (assuming one irq per channel)
753  * dma : dma instance (one GPDMA instance on stm32U5x)
755 #define DMA_STM32_DEFINE_IRQ_HANDLER(chan, dma)				\  argument
756 static void dma_stm32_irq_##dma##_##chan(const struct device *dev)	\