Lines Matching refs:DMA_CTRL_REG_GET_FIELD
37 #define DMA_CTRL_REG_GET_FIELD(_field, _var) \ macro
173 if (DMA_CTRL_REG_GET_FIELD(DMA_ON, regs->DMA_CTRL_REG)) { in dma_smartbond_is_dma_active()
226 while (DMA_CTRL_REG_GET_FIELD(DMA_ON, regs->DMA_CTRL_REG)) { in dma_smartbond_set_channel_status()
500 if (DMA_CTRL_REG_GET_FIELD(DMA_ON, dma_ctrl_reg)) { in dma_smartbond_config()
578 if (cfg->cyclic && DMA_CTRL_REG_GET_FIELD(DREQ_MODE, dma_ctrl_reg) != DREQ_MODE_HW) { in dma_smartbond_config()
585 if (DMA_CTRL_REG_GET_FIELD(DREQ_MODE, dma_ctrl_reg) == DREQ_MODE_SW && in dma_smartbond_config()
586 DMA_CTRL_REG_GET_FIELD(AINC, dma_ctrl_reg) == ADDR_ADJ_NO_CHANGE && in dma_smartbond_config()
587 DMA_CTRL_REG_GET_FIELD(BINC, dma_ctrl_reg) == ADDR_ADJ_INCR) { in dma_smartbond_config()
673 if (DMA_CTRL_REG_GET_FIELD(DMA_ON, regs->DMA_CTRL_REG)) { in dma_smartbond_reload()
731 if (DMA_CTRL_REG_GET_FIELD(DMA_ON, regs->DMA_CTRL_REG)) { in dma_smartbond_start()
836 bus_width = DMA_CTRL_REG_GET_FIELD(BW, dma_ctrl_reg); in dma_smartbond_get_status()
846 stat->busy = DMA_CTRL_REG_GET_FIELD(DMA_ON, dma_ctrl_reg); in dma_smartbond_get_status()