Lines Matching +full:data +full:- +full:bus +full:- +full:width
4 * SPDX-License-Identifier: Apache-2.0
45 DMA->DMA_REQ_MUX_REG = \
46 (DMA->DMA_REQ_MUX_REG & ~(0xf << DMA_MUX_SHIFT((_idx)))) | \
50 ((DMA->DMA_REQ_MUX_REG >> DMA_MUX_SHIFT((_idx))) & 0xf)
59 * when two or more channels request the bus at the same time. For channels of same priority an
93 * DMA bus width indicating how many bytes are retrived/written per transfer.
94 * Note that the bus width is the same for the source and destination.
155 /* Should be the first member of the driver data */
160 /* User callbacks and data to be stored per channel */
173 if (DMA_CTRL_REG_GET_FIELD(DMA_ON, regs->DMA_CTRL_REG)) { in dma_smartbond_is_dma_active()
207 DMA->DMA_CLEAR_INT_REG |= BIT(channel); in dma_smartbond_set_channel_status()
209 DMA->DMA_INT_MASK_REG |= BIT(channel); in dma_smartbond_set_channel_status()
218 DMA_CTRL_REG_SET_FIELD(DMA_ON, regs->DMA_CTRL_REG, 0x1); in dma_smartbond_set_channel_status()
220 DMA_CTRL_REG_SET_FIELD(DMA_ON, regs->DMA_CTRL_REG, 0x0); in dma_smartbond_set_channel_status()
224 * on-going transfer is complete (cannot be interrupted). in dma_smartbond_set_channel_status()
226 while (DMA_CTRL_REG_GET_FIELD(DMA_ON, regs->DMA_CTRL_REG)) { in dma_smartbond_set_channel_status()
230 DMA->DMA_INT_MASK_REG &= ~(BIT(channel)); in dma_smartbond_set_channel_status()
232 DMA->DMA_CLEAR_INT_REG |= BIT(channel); in dma_smartbond_set_channel_status()
253 secure_boot_reg = CRG_TOP->SECURE_BOOT_REG; in dma_channel_dst_addr_check_and_adjust()
261 * then only the secure channel #7 can be used to transfer data to AES key buffer. in dma_channel_dst_addr_check_and_adjust()
295 phy_address += (MCU_QSPIF_M_BASE - MCU_QSPIF_M_CACHED_BASE); in dma_channel_src_addr_check_and_adjust()
298 phy_address += (MCU_OTP_M_P_BASE - MCU_OTP_M_BASE); in dma_channel_src_addr_check_and_adjust()
301 secure_boot_reg = CRG_TOP->SECURE_BOOT_REG; in dma_channel_src_addr_check_and_adjust()
309 * secure channel #7 can be used to fetch secure keys data. in dma_channel_src_addr_check_and_adjust()
462 /* fall-through */ in dma_set_mux_request()
469 /* fall-through */ in dma_set_mux_request()
487 struct dma_smartbond_data *data = dev->data; in dma_smartbond_config() local
494 return -EINVAL; in dma_smartbond_config()
498 dma_ctrl_reg = regs->DMA_CTRL_REG; in dma_smartbond_config()
502 return -EIO; in dma_smartbond_config()
505 if (cfg == NULL || cfg->head_block == NULL) { in dma_smartbond_config()
507 return -EINVAL; in dma_smartbond_config()
511 if (!cfg->error_callback_dis) { in dma_smartbond_config()
515 if (!cfg->complete_callback_en) { in dma_smartbond_config()
516 data->channel_data[channel].cb = cfg->dma_callback; in dma_smartbond_config()
517 data->channel_data[channel].user_data = cfg->user_data; in dma_smartbond_config()
522 data->channel_data[channel].cb = NULL; in dma_smartbond_config()
523 data->channel_data[channel].user_data = NULL; in dma_smartbond_config()
526 data->channel_data[channel].dir = cfg->channel_direction; in dma_smartbond_config()
528 if (cfg->block_count > DMA_BLOCK_COUNT) { in dma_smartbond_config()
532 if (cfg->channel_priority >= DMA_SMARTBOND_CHANNEL_PRIO_MAX) { in dma_smartbond_config()
533 cfg->channel_priority = DMA_SMARTBOND_CHANNEL_PRIO_7; in dma_smartbond_config()
537 DMA_CTRL_REG_SET_FIELD(DMA_PRIO, dma_ctrl_reg, cfg->channel_priority); in dma_smartbond_config()
539 if (((cfg->source_burst_length != cfg->dest_burst_length) || in dma_smartbond_config()
540 !dma_channel_update_burst_mode(cfg->source_burst_length, &dma_ctrl_reg))) { in dma_smartbond_config()
542 return -EINVAL; in dma_smartbond_config()
545 data->channel_data[channel].burst_len = cfg->source_burst_length; in dma_smartbond_config()
547 if (cfg->source_data_size != cfg->dest_data_size || in dma_smartbond_config()
548 !dma_channel_update_bus_width(cfg->source_data_size, &dma_ctrl_reg)) { in dma_smartbond_config()
549 LOG_ERR("Invalid bus width or source and destination bus width mismatch"); in dma_smartbond_config()
550 return -EINVAL; in dma_smartbond_config()
553 data->channel_data[channel].bus_width = cfg->source_data_size; in dma_smartbond_config()
555 if (cfg->source_chaining_en || cfg->dest_chaining_en || in dma_smartbond_config()
556 cfg->head_block->source_gather_en || cfg->head_block->dest_scatter_en || in dma_smartbond_config()
557 cfg->head_block->source_reload_en || cfg->head_block->dest_reload_en) { in dma_smartbond_config()
561 if (!dma_channel_update_src_addr_adj(cfg->head_block->source_addr_adj, in dma_smartbond_config()
564 return -EINVAL; in dma_smartbond_config()
567 if (!dma_channel_update_dst_addr_adj(cfg->head_block->dest_addr_adj, &dma_ctrl_reg)) { in dma_smartbond_config()
569 return -EINVAL; in dma_smartbond_config()
572 if (!dma_channel_update_dreq_mode(cfg->channel_direction, &dma_ctrl_reg)) { in dma_smartbond_config()
574 return -EINVAL; in dma_smartbond_config()
578 if (cfg->cyclic && DMA_CTRL_REG_GET_FIELD(DREQ_MODE, dma_ctrl_reg) != DREQ_MODE_HW) { in dma_smartbond_config()
579 LOG_ERR("Circular mode is only supported for non memory-memory transfers"); in dma_smartbond_config()
580 return -EINVAL; in dma_smartbond_config()
583 DMA_CTRL_REG_SET_FIELD(CIRCULAR, dma_ctrl_reg, cfg->cyclic); in dma_smartbond_config()
597 dma_channel_update_req_sense(cfg->dma_slot, channel, &dma_ctrl_reg); in dma_smartbond_config()
599 regs->DMA_CTRL_REG = dma_ctrl_reg; in dma_smartbond_config()
602 src_dst_address = cfg->head_block->source_address; in dma_smartbond_config()
604 return -EINVAL; in dma_smartbond_config()
607 if (src_dst_address % cfg->source_data_size) { in dma_smartbond_config()
608 LOG_ERR("Source address is not bus width aligned"); in dma_smartbond_config()
609 return -EINVAL; in dma_smartbond_config()
612 regs->DMA_A_START = src_dst_address; in dma_smartbond_config()
614 src_dst_address = cfg->head_block->dest_address; in dma_smartbond_config()
616 return -EINVAL; in dma_smartbond_config()
619 if (src_dst_address % cfg->dest_data_size) { in dma_smartbond_config()
620 LOG_ERR("Destination address is not bus width aligned"); in dma_smartbond_config()
621 return -EINVAL; in dma_smartbond_config()
624 regs->DMA_B_START = src_dst_address; in dma_smartbond_config()
626 if (cfg->head_block->block_size % (cfg->source_data_size * cfg->source_burst_length)) { in dma_smartbond_config()
627 LOG_ERR("Requested data size is not multiple of bus width"); in dma_smartbond_config()
628 return -EINVAL; in dma_smartbond_config()
631 regs->DMA_LEN_REG = (cfg->head_block->block_size / cfg->source_data_size) - 1; in dma_smartbond_config()
634 regs->DMA_INT_REG = (cfg->head_block->block_size / cfg->source_data_size) - 1; in dma_smartbond_config()
636 if ((cfg->source_handshake != cfg->dest_handshake) || in dma_smartbond_config()
637 (cfg->source_handshake != 0)/*HW*/) { in dma_smartbond_config()
639 return -EINVAL; in dma_smartbond_config()
642 dma_set_mux_request(cfg->dma_slot, channel); in dma_smartbond_config()
645 data->channel_data[channel].is_dma_configured = true; in dma_smartbond_config()
654 struct dma_smartbond_data *data = dev->data; in dma_smartbond_reload() local
659 return -EINVAL; in dma_smartbond_reload()
663 if (!data->channel_data[channel].is_dma_configured) { in dma_smartbond_reload()
665 return -EINVAL; in dma_smartbond_reload()
670 return -EINVAL; in dma_smartbond_reload()
673 if (DMA_CTRL_REG_GET_FIELD(DMA_ON, regs->DMA_CTRL_REG)) { in dma_smartbond_reload()
674 LOG_ERR("Channel is busy, settings cannot be changed mid-transfer"); in dma_smartbond_reload()
675 return -EBUSY; in dma_smartbond_reload()
678 if (src % data->channel_data[channel].bus_width) { in dma_smartbond_reload()
679 LOG_ERR("Source address is not bus width aligned"); in dma_smartbond_reload()
680 return -EINVAL; in dma_smartbond_reload()
684 return -EINVAL; in dma_smartbond_reload()
687 regs->DMA_A_START = src; in dma_smartbond_reload()
689 if (dst % data->channel_data[channel].bus_width) { in dma_smartbond_reload()
690 LOG_ERR("Destination address is not bus width aligned"); in dma_smartbond_reload()
691 return -EINVAL; in dma_smartbond_reload()
695 return -EINVAL; in dma_smartbond_reload()
698 regs->DMA_B_START = dst; in dma_smartbond_reload()
700 if (size % (data->channel_data[channel].burst_len * in dma_smartbond_reload()
701 data->channel_data[channel].bus_width)) { in dma_smartbond_reload()
702 LOG_ERR("Requested data size is not multiple of bus width"); in dma_smartbond_reload()
703 return -EINVAL; in dma_smartbond_reload()
706 regs->DMA_LEN_REG = (size / data->channel_data[channel].bus_width) - 1; in dma_smartbond_reload()
709 regs->DMA_INT_REG = (size / data->channel_data[channel].bus_width) - 1; in dma_smartbond_reload()
717 struct dma_smartbond_data *data = dev->data; in dma_smartbond_start() local
721 return -EINVAL; in dma_smartbond_start()
725 if (!data->channel_data[channel].is_dma_configured) { in dma_smartbond_start()
727 return -EINVAL; in dma_smartbond_start()
731 if (DMA_CTRL_REG_GET_FIELD(DMA_ON, regs->DMA_CTRL_REG)) { in dma_smartbond_start()
746 return -EINVAL; in dma_smartbond_stop()
764 return -EINVAL; in dma_smartbond_suspend()
768 * Freezing the DMA engine is valid for memory-to-memory operations. in dma_smartbond_suspend()
776 * register next time the channel was re-enabled. in dma_smartbond_suspend()
778 GPREG->SET_FREEZE_REG = GPREG_SET_FREEZE_REG_FRZ_DMA_Msk; in dma_smartbond_suspend()
787 return -EINVAL; in dma_smartbond_resume()
793 GPREG->RESET_FREEZE_REG = GPREG_RESET_FREEZE_REG_FRZ_DMA_Msk; in dma_smartbond_resume()
803 struct dma_smartbond_data *data = dev->data; in dma_smartbond_get_status() local
809 return -EINVAL; in dma_smartbond_get_status()
816 if (!data->channel_data[channel].is_dma_configured) { in dma_smartbond_get_status()
818 return -EINVAL; in dma_smartbond_get_status()
824 * The DMA is running in parallel with CPU and so it might happen that an on-going transfer in dma_smartbond_get_status()
831 dma_ctrl_reg = regs->DMA_CTRL_REG; in dma_smartbond_get_status()
832 dma_idx_reg = regs->DMA_IDX_REG; in dma_smartbond_get_status()
833 dma_len_reg = regs->DMA_LEN_REG; in dma_smartbond_get_status()
844 stat->total_copied = dma_idx_reg * bus_width; in dma_smartbond_get_status()
845 stat->pending_length = (dma_len_reg - dma_idx_reg) * bus_width; in dma_smartbond_get_status()
846 stat->busy = DMA_CTRL_REG_GET_FIELD(DMA_ON, dma_ctrl_reg); in dma_smartbond_get_status()
847 stat->dir = data->channel_data[channel].dir; in dma_smartbond_get_status()
850 stat->free = 0; in dma_smartbond_get_status()
851 stat->read_position = 0; in dma_smartbond_get_status()
852 stat->write_position = 0; in dma_smartbond_get_status()
863 return -EINVAL; in dma_smartbond_get_attribute()
868 * Source and destination addresses should be multiple of a channel's bus width. in dma_smartbond_get_attribute()
875 * Buffer size should be multiple of a channel's bus width multiplied by burst length. in dma_smartbond_get_attribute()
880 return -ENOSYS; in dma_smartbond_get_attribute()
885 return -EINVAL; in dma_smartbond_get_attribute()
895 return -EINVAL; in dma_smartbond_chan_filter()
929 struct dma_smartbond_data *data = ((const struct device *)arg)->data; in smartbond_dma_isr() local
935 for (i = 0, dma_int_status_reg = DMA->DMA_INT_STATUS_REG; in smartbond_dma_isr()
944 * bytes has been transferred. Bus errors cannot raise interrupts. in smartbond_dma_isr()
946 if (data->channel_data[i].cb) { in smartbond_dma_isr()
947 data->channel_data[i].cb((const struct device *)arg, in smartbond_dma_isr()
948 data->channel_data[i].user_data, i, DMA_STATUS_COMPLETE); in smartbond_dma_isr()
951 DMA->DMA_CLEAR_INT_REG = BIT(i); in smartbond_dma_isr()
959 struct dma_smartbond_data *data = dev->data; in dma_smartbond_is_sleep_allowed() local
961 for (int i = 0; i < data->dma_ctx.dma_channels; i++) { in dma_smartbond_is_sleep_allowed()
962 if (atomic_test_bit(data->dma_ctx.atomic, i)) { in dma_smartbond_is_sleep_allowed()
986 ret = -EBUSY; in dma_smartbond_pm_action()
1000 return -ENOTSUP; in dma_smartbond_pm_action()
1010 LOG_ERR("64-bit addressing mode is not supported\n"); in dma_smartbond_init()
1011 return -ENOSYS; in dma_smartbond_init()
1015 struct dma_smartbond_data *data; in dma_smartbond_init() local
1017 data = dev->data; in dma_smartbond_init()
1018 data->dma_ctx.magic = DMA_MAGIC; in dma_smartbond_init()
1019 data->dma_ctx.dma_channels = DMA_CHANNELS_COUNT; in dma_smartbond_init()
1020 data->dma_ctx.atomic = data->channels_atomic; in dma_smartbond_init()
1025 data->channel_data[idx].is_dma_configured = false; in dma_smartbond_init()