Lines Matching +full:rpi +full:- +full:pico +full:- +full:dma +full:- +full:rp2350
4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/drivers/dma.h>
14 #include <zephyr/dt-bindings/dma/rpi-pico-dma-rp2040.h>
16 #include <zephyr/dt-bindings/dma/rpi-pico-dma-rp2350.h>
19 #include <hardware/dma.h>
60 const struct dma_rpi_pico_config *cfg = dev->config; in rpi_pico_dma_channel_clear_error_flags()
62 ((dma_hw_t *)cfg->reg)->ch[channel].al1_ctrl &= ~DMA_INT_ERROR_FLAGS; in rpi_pico_dma_channel_clear_error_flags()
68 const struct dma_rpi_pico_config *cfg = dev->config; in rpi_pico_dma_channel_get_error_flags()
70 return ((dma_hw_t *)cfg->reg)->ch[channel].al1_ctrl & DMA_INT_ERROR_FLAGS; in rpi_pico_dma_channel_get_error_flags()
75 const struct dma_rpi_pico_config *cfg = dev->config; in rpi_pico_dma_channel_abort()
77 ((dma_hw_t *)cfg->reg)->abort = BIT(channel); in rpi_pico_dma_channel_abort()
98 const struct dma_rpi_pico_config *cfg = dev->config; in dma_rpi_pico_channel_irq()
100 for (size_t i = 0; i < cfg->irq0_channels_size; i++) { in dma_rpi_pico_channel_irq()
101 if (cfg->irq0_channels[i] == channel) { in dma_rpi_pico_channel_irq()
116 const struct dma_rpi_pico_config *cfg = dev->config; in dma_rpi_pico_config()
117 struct dma_rpi_pico_data *data = dev->data; in dma_rpi_pico_config()
119 if (channel >= cfg->channels) { in dma_rpi_pico_config()
120 LOG_ERR("channel must be < %" PRIu32 " (%" PRIu32 ")", cfg->channels, channel); in dma_rpi_pico_config()
121 return -EINVAL; in dma_rpi_pico_config()
124 if (dma_cfg->block_count != 1) { in dma_rpi_pico_config()
126 return -ENOTSUP; in dma_rpi_pico_config()
129 if (dma_cfg->channel_priority > 3) { in dma_rpi_pico_config()
130 LOG_ERR("channel_priority must be < 4 (%" PRIu32 ")", dma_cfg->channel_priority); in dma_rpi_pico_config()
131 return -EINVAL; in dma_rpi_pico_config()
134 if (dma_cfg->head_block->source_addr_adj == DMA_ADDR_ADJ_DECREMENT) { in dma_rpi_pico_config()
136 return -ENOTSUP; in dma_rpi_pico_config()
139 if (dma_cfg->head_block->dest_addr_adj == DMA_ADDR_ADJ_DECREMENT) { in dma_rpi_pico_config()
141 return -ENOTSUP; in dma_rpi_pico_config()
144 if (dma_cfg->head_block->source_addr_adj != DMA_ADDR_ADJ_INCREMENT && in dma_rpi_pico_config()
145 dma_cfg->head_block->source_addr_adj != DMA_ADDR_ADJ_NO_CHANGE) { in dma_rpi_pico_config()
146 LOG_ERR("invalid source_addr_adj %" PRIu16, dma_cfg->head_block->source_addr_adj); in dma_rpi_pico_config()
147 return -ENOTSUP; in dma_rpi_pico_config()
149 if (dma_cfg->head_block->dest_addr_adj != DMA_ADDR_ADJ_INCREMENT && in dma_rpi_pico_config()
150 dma_cfg->head_block->dest_addr_adj != DMA_ADDR_ADJ_NO_CHANGE) { in dma_rpi_pico_config()
151 LOG_ERR("invalid dest_addr_adj %" PRIu16, dma_cfg->head_block->dest_addr_adj); in dma_rpi_pico_config()
152 return -ENOTSUP; in dma_rpi_pico_config()
155 if (dma_cfg->source_data_size != 1 && dma_cfg->source_data_size != 2 && in dma_rpi_pico_config()
156 dma_cfg->source_data_size != 4) { in dma_rpi_pico_config()
158 dma_cfg->source_data_size); in dma_rpi_pico_config()
159 return -EINVAL; in dma_rpi_pico_config()
162 if (dma_cfg->source_data_size != dma_cfg->dest_data_size) { in dma_rpi_pico_config()
163 return -EINVAL; in dma_rpi_pico_config()
166 if (dma_cfg->dest_data_size != 1 && dma_cfg->dest_data_size != 2 && in dma_rpi_pico_config()
167 dma_cfg->dest_data_size != 4) { in dma_rpi_pico_config()
168 LOG_ERR("dest_data_size must be 1, 2, or 4 (%" PRIu32 ")", dma_cfg->dest_data_size); in dma_rpi_pico_config()
169 return -EINVAL; in dma_rpi_pico_config()
172 if (dma_cfg->channel_direction > PERIPHERAL_TO_MEMORY) { in dma_rpi_pico_config()
175 dma_cfg->channel_direction); in dma_rpi_pico_config()
176 return -ENOTSUP; in dma_rpi_pico_config()
179 data->channels[channel].config = dma_channel_get_default_config(channel); in dma_rpi_pico_config()
181 data->channels[channel].source_address = (void *)dma_cfg->head_block->source_address; in dma_rpi_pico_config()
182 data->channels[channel].dest_address = (void *)dma_cfg->head_block->dest_address; in dma_rpi_pico_config()
183 data->channels[channel].block_size = dma_cfg->head_block->block_size; in dma_rpi_pico_config()
184 channel_config_set_read_increment(&data->channels[channel].config, in dma_rpi_pico_config()
185 dma_cfg->head_block->source_addr_adj == in dma_rpi_pico_config()
187 channel_config_set_write_increment(&data->channels[channel].config, in dma_rpi_pico_config()
188 dma_cfg->head_block->dest_addr_adj == in dma_rpi_pico_config()
191 &data->channels[channel].config, in dma_rpi_pico_config()
192 dma_rpi_pico_transfer_size(dma_cfg->source_data_size)); in dma_rpi_pico_config()
193 channel_config_set_dreq(&data->channels[channel].config, in dma_rpi_pico_config()
194 RPI_PICO_DMA_SLOT_TO_DREQ(dma_cfg->dma_slot)); in dma_rpi_pico_config()
195 channel_config_set_high_priority(&data->channels[channel].config, in dma_rpi_pico_config()
196 !!(dma_cfg->channel_priority)); in dma_rpi_pico_config()
198 data->channels[channel].callback = dma_cfg->dma_callback; in dma_rpi_pico_config()
199 data->channels[channel].user_data = dma_cfg->user_data; in dma_rpi_pico_config()
200 data->channels[channel].direction = dma_cfg->channel_direction; in dma_rpi_pico_config()
208 const struct dma_rpi_pico_config *cfg = dev->config; in dma_rpi_pico_reload()
209 struct dma_rpi_pico_data *data = dev->data; in dma_rpi_pico_reload()
211 if (ch >= cfg->channels) { in dma_rpi_pico_reload()
212 LOG_ERR("reload channel must be < %" PRIu32 " (%" PRIu32 ")", cfg->channels, ch); in dma_rpi_pico_reload()
213 return -EINVAL; in dma_rpi_pico_reload()
217 return -EBUSY; in dma_rpi_pico_reload()
220 data->channels[ch].source_address = (void *)src; in dma_rpi_pico_reload()
221 data->channels[ch].dest_address = (void *)dst; in dma_rpi_pico_reload()
222 data->channels[ch].block_size = size; in dma_rpi_pico_reload()
223 dma_channel_configure(ch, &data->channels[ch].config, data->channels[ch].dest_address, in dma_rpi_pico_reload()
224 data->channels[ch].source_address, data->channels[ch].block_size, in dma_rpi_pico_reload()
232 const struct dma_rpi_pico_config *cfg = dev->config; in dma_rpi_pico_start()
233 struct dma_rpi_pico_data *data = dev->data; in dma_rpi_pico_start()
235 if (ch >= cfg->channels) { in dma_rpi_pico_start()
236 LOG_ERR("start channel must be < %" PRIu32 " (%" PRIu32 ")", cfg->channels, ch); in dma_rpi_pico_start()
237 return -EINVAL; in dma_rpi_pico_start()
243 dma_channel_configure(ch, &data->channels[ch].config, data->channels[ch].dest_address, in dma_rpi_pico_start()
244 data->channels[ch].source_address, data->channels[ch].block_size, in dma_rpi_pico_start()
252 const struct dma_rpi_pico_config *cfg = dev->config; in dma_rpi_pico_stop()
254 if (ch >= cfg->channels) { in dma_rpi_pico_stop()
255 LOG_ERR("stop channel must be < %" PRIu32 " (%" PRIu32 ")", cfg->channels, ch); in dma_rpi_pico_stop()
256 return -EINVAL; in dma_rpi_pico_stop()
275 const struct dma_rpi_pico_config *cfg = dev->config; in dma_rpi_pico_get_status()
276 struct dma_rpi_pico_data *data = dev->data; in dma_rpi_pico_get_status()
278 if (ch >= cfg->channels) { in dma_rpi_pico_get_status()
279 LOG_ERR("channel must be < %" PRIu32 " (%" PRIu32 ")", cfg->channels, ch); in dma_rpi_pico_get_status()
280 return -EINVAL; in dma_rpi_pico_get_status()
283 stat->pending_length = 0; in dma_rpi_pico_get_status()
284 stat->dir = data->channels[ch].direction; in dma_rpi_pico_get_status()
285 stat->busy = dma_channel_is_busy(ch); in dma_rpi_pico_get_status()
305 const struct dma_rpi_pico_config *cfg = dev->config; in dma_rpi_pico_init()
307 (void)reset_line_toggle_dt(&cfg->reset); in dma_rpi_pico_init()
309 cfg->irq_configure(); in dma_rpi_pico_init()
316 const struct dma_rpi_pico_config *cfg = dev->config; in dma_rpi_pico_isr()
317 struct dma_rpi_pico_data *data = dev->data; in dma_rpi_pico_isr()
320 for (uint32_t i = 0; i < cfg->channels; i++) { in dma_rpi_pico_isr()
326 err = -EIO; in dma_rpi_pico_isr()
333 if (data->channels[i].callback) { in dma_rpi_pico_isr()
334 data->channels[i].callback(dev, data->channels[i].user_data, i, err); in dma_rpi_pico_isr()
339 static DEVICE_API(dma, dma_rpi_pico_driver_api) = {