38 	if (!EDMA_ChannelRegRead(data->hal_cfg, chan->id, EDMA_TCD_CH_INT)) {  in edma_isr()
44 	EDMA_ChannelRegUpdate(data->hal_cfg, chan->id,  in edma_isr()
126 	if (!EDMA_TransferWidthIsValid(data->hal_cfg, dma_cfg->source_data_size)) {  in edma_config()
133 	if (!EDMA_TransferWidthIsValid(data->hal_cfg, dma_cfg->dest_data_size)) {  in edma_config()
140 	if (!EDMA_TransferWidthIsValid(data->hal_cfg, CONFIG_DMA_NXP_EDMA_ALIGN)) {  in edma_config()
296 	ret = EDMA_ConfigureTransfer(data->hal_cfg, chan_id,  in edma_config()
310 	if (EDMA_HAS_MUX(data->hal_cfg)) {  in edma_config()
311 		ret = EDMA_SetChannelMux(data->hal_cfg, chan_id, dma_cfg->dma_slot);  in edma_config()
331 	EDMA_ChannelRegUpdate(data->hal_cfg, chan_id,  in edma_config()
338 		EDMA_ChannelRegUpdate(data->hal_cfg, chan_id, EDMA_TCD_CSR,  in edma_config()
378 		citer = EDMA_ChannelRegRead(data->hal_cfg, chan_id, EDMA_TCD_CITER);  in edma_get_status()
379 		biter = EDMA_ChannelRegRead(data->hal_cfg, chan_id, EDMA_TCD_BITER);  in edma_get_status()
380 		done = EDMA_ChannelRegRead(data->hal_cfg, chan_id, EDMA_TCD_CH_CSR) &  in edma_get_status()
424 	EDMA_ChannelRegUpdate(data->hal_cfg, chan_id,  in edma_suspend()
470 	EDMA_ChannelRegUpdate(data->hal_cfg, chan_id, EDMA_TCD_CH_CSR, 0,  in edma_stop()
482 	if (EDMA_HAS_MUX(data->hal_cfg)) {  in edma_stop()
483 		ret = EDMA_SetChannelMux(data->hal_cfg, chan_id, 0);  in edma_stop()
523 	EDMA_ChannelRegUpdate(data->hal_cfg, chan_id,  in edma_start()
699 	data->hal_cfg = edma_hal_cfg_get(cfg);  in edma_init()
700 	if (!data->hal_cfg) {  in edma_init()
711 	data->hal_cfg->regmap = (uint32_t)POINTER_TO_UINT(regmap);  in edma_init()
721 	data->ctx.dma_channels = data->hal_cfg->channels;  in edma_init()