Lines Matching +full:output +full:- +full:pixel +full:- +full:format

2  * Copyright 2023-2024 NXP
5 * SPDX-License-Identifier: Apache-2.0
38 const struct dma_mcux_pxp_config *config = dev->config; in dma_mcux_pxp_irq_handler()
39 struct dma_mcux_pxp_data *data = dev->data; in dma_mcux_pxp_irq_handler()
41 PXP_ClearStatusFlags(config->base, kPXP_CompleteFlag); in dma_mcux_pxp_irq_handler()
43 DCACHE_InvalidateByRange((uint32_t)data->out_buf_addr, data->out_buf_size); in dma_mcux_pxp_irq_handler()
45 if (data->dma_callback) { in dma_mcux_pxp_irq_handler()
46 data->dma_callback(dev, data->user_data, 0, 0); in dma_mcux_pxp_irq_handler()
54 const struct dma_mcux_pxp_config *dev_config = dev->config; in dma_mcux_pxp_configure()
55 struct dma_mcux_pxp_data *dev_data = dev->data; in dma_mcux_pxp_configure()
63 if (config->channel_direction != MEMORY_TO_MEMORY) { in dma_mcux_pxp_configure()
64 return -ENOTSUP; in dma_mcux_pxp_configure()
67 * Use the DMA slot value to get the pixel format and rotation in dma_mcux_pxp_configure()
70 switch ((config->dma_slot & DMA_MCUX_PXP_CMD_MASK) >> DMA_MCUX_PXP_CMD_SHIFT) { in dma_mcux_pxp_configure()
84 return -ENOTSUP; in dma_mcux_pxp_configure()
86 switch ((config->dma_slot & DMA_MCUX_PXP_FMT_MASK) >> DMA_MCUX_PXP_FMT_SHIFT) { in dma_mcux_pxp_configure()
109 return -ENOTSUP; in dma_mcux_pxp_configure()
114 switch ((config->linked_channel & DMA_MCUX_PXP_FLIP_MASK) >> DMA_MCUX_PXP_FLIP_SHIFT) { in dma_mcux_pxp_configure()
128 return -ENOTSUP; in dma_mcux_pxp_configure()
130 DCACHE_CleanByRange((uint32_t)config->head_block->source_address, in dma_mcux_pxp_configure()
131 config->head_block->block_size); in dma_mcux_pxp_configure()
137 * head block destination address: Output buffer address in dma_mcux_pxp_configure()
145 ps_buffer_cfg.bufferAddr = config->head_block->source_address; in dma_mcux_pxp_configure()
148 ps_buffer_cfg.pitchBytes = config->source_data_size; in dma_mcux_pxp_configure()
149 PXP_SetProcessSurfaceBufferConfig(dev_config->base, &ps_buffer_cfg); in dma_mcux_pxp_configure()
152 output_buffer_cfg.buffer0Addr = config->head_block->dest_address; in dma_mcux_pxp_configure()
154 output_buffer_cfg.pitchBytes = config->dest_data_size; in dma_mcux_pxp_configure()
155 output_buffer_cfg.width = (config->dest_data_size / bytes_per_pixel); in dma_mcux_pxp_configure()
156 output_buffer_cfg.height = config->dest_burst_length; in dma_mcux_pxp_configure()
157 PXP_SetOutputBufferConfig(dev_config->base, &output_buffer_cfg); in dma_mcux_pxp_configure()
159 PXP_SetProcessSurfacePosition(dev_config->base, 0U, 0U, output_buffer_cfg.width, in dma_mcux_pxp_configure()
162 PXP_SetRotateConfig(dev_config->base, kPXP_RotateProcessSurface, rotate, flip); in dma_mcux_pxp_configure()
164 dev_data->ps_buf_addr = config->head_block->source_address; in dma_mcux_pxp_configure()
165 dev_data->ps_buf_size = config->head_block->block_size; in dma_mcux_pxp_configure()
166 dev_data->out_buf_addr = config->head_block->dest_address; in dma_mcux_pxp_configure()
167 dev_data->out_buf_size = config->head_block->block_size; in dma_mcux_pxp_configure()
168 dev_data->dma_callback = config->dma_callback; in dma_mcux_pxp_configure()
169 dev_data->user_data = config->user_data; in dma_mcux_pxp_configure()
175 const struct dma_mcux_pxp_config *config = dev->config; in dma_mcux_pxp_start()
176 struct dma_mcux_pxp_data *data = dev->data; in dma_mcux_pxp_start()
178 DCACHE_CleanByRange((uint32_t)data->ps_buf_addr, data->ps_buf_size); in dma_mcux_pxp_start()
182 PXP_Start(config->base); in dma_mcux_pxp_start()
193 const struct dma_mcux_pxp_config *config = dev->config; in dma_mcux_pxp_init()
195 PXP_Init(config->base); in dma_mcux_pxp_init()
196 PXP_SetProcessSurfaceBackGroundColor(config->base, 0U); in dma_mcux_pxp_init()
198 PXP_SetAlphaSurfacePosition(config->base, 0xFFFFU, 0xFFFFU, 0U, 0U); in dma_mcux_pxp_init()
199 PXP_EnableCsc1(config->base, false); in dma_mcux_pxp_init()
200 PXP_EnableInterrupts(config->base, kPXP_CompleteInterruptEnable); in dma_mcux_pxp_init()
201 config->irq_config_func(dev); in dma_mcux_pxp_init()