Lines Matching refs:cfg
34 const struct intel_adsp_hda_dma_cfg *const cfg = dev->config; in intel_adsp_hda_dma_host_in_config() local
39 __ASSERT(channel < cfg->dma_channels, "Channel does not exist"); in intel_adsp_hda_dma_host_in_config()
43 __ASSERT(dma_cfg->channel_direction == cfg->direction, in intel_adsp_hda_dma_host_in_config()
49 res = intel_adsp_hda_set_buffer(cfg->base, cfg->regblock_size, channel, buf, in intel_adsp_hda_dma_host_in_config()
53 *DGMBS(cfg->base, cfg->regblock_size, channel) = in intel_adsp_hda_dma_host_in_config()
56 intel_adsp_hda_set_sample_container_size(cfg->base, cfg->regblock_size, channel, in intel_adsp_hda_dma_host_in_config()
68 const struct intel_adsp_hda_dma_cfg *const cfg = dev->config; in intel_adsp_hda_dma_host_out_config() local
73 __ASSERT(channel < cfg->dma_channels, "Channel does not exist"); in intel_adsp_hda_dma_host_out_config()
77 __ASSERT(dma_cfg->channel_direction == cfg->direction, in intel_adsp_hda_dma_host_out_config()
84 res = intel_adsp_hda_set_buffer(cfg->base, cfg->regblock_size, channel, buf, in intel_adsp_hda_dma_host_out_config()
88 *DGMBS(cfg->base, cfg->regblock_size, channel) = in intel_adsp_hda_dma_host_out_config()
91 intel_adsp_hda_set_sample_container_size(cfg->base, cfg->regblock_size, channel, in intel_adsp_hda_dma_host_out_config()
102 const struct intel_adsp_hda_dma_cfg *const cfg = dev->config; in intel_adsp_hda_dma_link_in_config() local
107 __ASSERT(channel < cfg->dma_channels, "Channel does not exist"); in intel_adsp_hda_dma_link_in_config()
111 __ASSERT(dma_cfg->channel_direction == cfg->direction, in intel_adsp_hda_dma_link_in_config()
117 res = intel_adsp_hda_set_buffer(cfg->base, cfg->regblock_size, channel, buf, in intel_adsp_hda_dma_link_in_config()
120 intel_adsp_hda_set_sample_container_size(cfg->base, cfg->regblock_size, channel, in intel_adsp_hda_dma_link_in_config()
132 const struct intel_adsp_hda_dma_cfg *const cfg = dev->config; in intel_adsp_hda_dma_link_out_config() local
137 __ASSERT(channel < cfg->dma_channels, "Channel does not exist"); in intel_adsp_hda_dma_link_out_config()
141 __ASSERT(dma_cfg->channel_direction == cfg->direction, in intel_adsp_hda_dma_link_out_config()
148 res = intel_adsp_hda_set_buffer(cfg->base, cfg->regblock_size, channel, buf, in intel_adsp_hda_dma_link_out_config()
151 intel_adsp_hda_set_sample_container_size(cfg->base, cfg->regblock_size, channel, in intel_adsp_hda_dma_link_out_config()
162 const struct intel_adsp_hda_dma_cfg *const cfg = dev->config; in intel_adsp_hda_dma_link_reload() local
164 __ASSERT(channel < cfg->dma_channels, "Channel does not exist"); in intel_adsp_hda_dma_link_reload()
166 intel_adsp_hda_link_commit(cfg->base, cfg->regblock_size, channel, size); in intel_adsp_hda_dma_link_reload()
174 const struct intel_adsp_hda_dma_cfg *const cfg = dev->config; in intel_adsp_hda_dma_host_reload() local
176 __ASSERT(channel < cfg->dma_channels, "Channel does not exist"); in intel_adsp_hda_dma_host_reload()
179 const size_t buf_size = intel_adsp_hda_get_buffer_size(cfg->base, cfg->regblock_size, in intel_adsp_hda_dma_host_reload()
187 switch (cfg->direction) { in intel_adsp_hda_dma_host_reload()
190 const uint32_t rp = *DGBRP(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_host_reload()
194 intel_adsp_hda_set_buffer_segment_ptr(cfg->base, cfg->regblock_size, in intel_adsp_hda_dma_host_reload()
196 intel_adsp_hda_enable_buffer_interrupt(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_host_reload()
200 const uint32_t wp = *DGBWP(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_host_reload()
204 intel_adsp_hda_set_buffer_segment_ptr(cfg->base, cfg->regblock_size, in intel_adsp_hda_dma_host_reload()
206 intel_adsp_hda_enable_buffer_interrupt(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_host_reload()
213 intel_adsp_hda_host_commit(cfg->base, cfg->regblock_size, channel, size); in intel_adsp_hda_dma_host_reload()
221 const struct intel_adsp_hda_dma_cfg *const cfg = dev->config; in intel_adsp_hda_dma_status() local
226 __ASSERT(channel < cfg->dma_channels, "Channel does not exist"); in intel_adsp_hda_dma_status()
228 uint32_t unused = intel_adsp_hda_unused(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_status()
229 uint32_t used = *DGBS(cfg->base, cfg->regblock_size, channel) - unused; in intel_adsp_hda_dma_status()
231 stat->dir = cfg->direction; in intel_adsp_hda_dma_status()
232 stat->busy = *DGCS(cfg->base, cfg->regblock_size, channel) & DGCS_GBUSY; in intel_adsp_hda_dma_status()
233 stat->write_position = *DGBWP(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_status()
234 stat->read_position = *DGBRP(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_status()
240 if (cfg->direction == MEMORY_TO_PERIPHERAL || cfg->direction == PERIPHERAL_TO_MEMORY) { in intel_adsp_hda_dma_status()
243 tmp = *DGLLLPL(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_status()
244 llp_u = *DGLLLPU(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_status()
245 llp_l = *DGLLLPL(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_status()
248 llp_u = *DGLLLPU(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_status()
254 switch (cfg->direction) { in intel_adsp_hda_dma_status()
256 xrun_det = intel_adsp_hda_is_buffer_underrun(cfg->base, cfg->regblock_size, in intel_adsp_hda_dma_status()
259 intel_adsp_hda_underrun_clear(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_status()
264 xrun_det = intel_adsp_hda_is_buffer_overrun(cfg->base, cfg->regblock_size, in intel_adsp_hda_dma_status()
267 intel_adsp_hda_overrun_clear(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_status()
297 const struct intel_adsp_hda_dma_cfg *const cfg = dev->config; in intel_adsp_hda_dma_start() local
301 __ASSERT(channel < cfg->dma_channels, "Channel does not exist"); in intel_adsp_hda_dma_start()
322 if (intel_adsp_hda_is_enabled(cfg->base, cfg->regblock_size, channel)) { in intel_adsp_hda_dma_start()
326 set_fifordy = (cfg->direction == HOST_TO_MEMORY || cfg->direction == MEMORY_TO_HOST); in intel_adsp_hda_dma_start()
327 intel_adsp_hda_enable(cfg->base, cfg->regblock_size, channel, set_fifordy); in intel_adsp_hda_dma_start()
329 if (cfg->direction == MEMORY_TO_PERIPHERAL) { in intel_adsp_hda_dma_start()
330 size = intel_adsp_hda_get_buffer_size(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_start()
331 intel_adsp_hda_link_commit(cfg->base, cfg->regblock_size, channel, size); in intel_adsp_hda_dma_start()
344 const struct intel_adsp_hda_dma_cfg *const cfg = dev->config; in intel_adsp_hda_dma_stop() local
346 __ASSERT(channel < cfg->dma_channels, "Channel does not exist"); in intel_adsp_hda_dma_stop()
348 if (!intel_adsp_hda_is_enabled(cfg->base, cfg->regblock_size, channel)) { in intel_adsp_hda_dma_stop()
352 intel_adsp_hda_disable(cfg->base, cfg->regblock_size, channel); in intel_adsp_hda_dma_stop()
354 if (!WAIT_FOR(!intel_adsp_hda_is_enabled(cfg->base, cfg->regblock_size, channel), 1000, in intel_adsp_hda_dma_stop()
364 const struct intel_adsp_hda_dma_cfg *const cfg = dev->config; in intel_adsp_hda_channels_init() local
366 for (uint32_t i = 0; i < cfg->dma_channels; i++) { in intel_adsp_hda_channels_init()
367 intel_adsp_hda_init(cfg->base, cfg->regblock_size, i); in intel_adsp_hda_channels_init()
369 if (intel_adsp_hda_is_enabled(cfg->base, cfg->regblock_size, i)) { in intel_adsp_hda_channels_init()
372 size = intel_adsp_hda_get_buffer_size(cfg->base, cfg->regblock_size, i); in intel_adsp_hda_channels_init()
373 intel_adsp_hda_disable(cfg->base, cfg->regblock_size, i); in intel_adsp_hda_channels_init()
374 intel_adsp_hda_link_commit(cfg->base, cfg->regblock_size, i, size); in intel_adsp_hda_channels_init()
380 if (cfg->irq_config) { in intel_adsp_hda_channels_init()
381 cfg->irq_config(); in intel_adsp_hda_channels_init()
405 const struct intel_adsp_hda_dma_cfg *const cfg = dev->config; in intel_adsp_hda_dma_init() local
407 data->ctx.dma_channels = cfg->dma_channels; in intel_adsp_hda_dma_init()
444 const struct intel_adsp_hda_dma_cfg *cfg; in intel_adsp_hda_dma_isr() local
468 cfg = host_dev[i]->config; in intel_adsp_hda_dma_isr()
476 if (!intel_adsp_hda_is_buffer_interrupt_enabled(cfg->base, in intel_adsp_hda_dma_isr()
477 cfg->regblock_size, j)) { in intel_adsp_hda_dma_isr()
481 if (intel_adsp_hda_check_buffer_interrupt(cfg->base, in intel_adsp_hda_dma_isr()
482 cfg->regblock_size, j)) { in intel_adsp_hda_dma_isr()
484 intel_adsp_hda_disable_buffer_interrupt(cfg->base, in intel_adsp_hda_dma_isr()
485 cfg->regblock_size, j); in intel_adsp_hda_dma_isr()
486 intel_adsp_hda_clear_buffer_interrupt(cfg->base, in intel_adsp_hda_dma_isr()
487 cfg->regblock_size, j); in intel_adsp_hda_dma_isr()