340 			   struct dma_config *dma_cfg)  in dma_gd32_config()  argument
355 	if (dma_cfg->block_count != 1) {  in dma_gd32_config()
360 	if (dma_cfg->channel_priority > 3) {  in dma_gd32_config()
362 			dma_cfg->channel_priority);  in dma_gd32_config()
366 	if (dma_cfg->head_block->source_addr_adj == DMA_ADDR_ADJ_DECREMENT) {  in dma_gd32_config()
371 	if (dma_cfg->head_block->dest_addr_adj == DMA_ADDR_ADJ_DECREMENT) {  in dma_gd32_config()
376 	if (dma_cfg->head_block->source_addr_adj != DMA_ADDR_ADJ_INCREMENT &&  in dma_gd32_config()
377 	    dma_cfg->head_block->source_addr_adj != DMA_ADDR_ADJ_NO_CHANGE) {  in dma_gd32_config()
379 			dma_cfg->head_block->source_addr_adj);  in dma_gd32_config()
382 	if (dma_cfg->head_block->dest_addr_adj != DMA_ADDR_ADJ_INCREMENT &&  in dma_gd32_config()
383 	    dma_cfg->head_block->dest_addr_adj != DMA_ADDR_ADJ_NO_CHANGE) {  in dma_gd32_config()
385 			dma_cfg->head_block->dest_addr_adj);  in dma_gd32_config()
389 	if (dma_cfg->source_data_size != 1 && dma_cfg->source_data_size != 2 &&  in dma_gd32_config()
390 	    dma_cfg->source_data_size != 4) {  in dma_gd32_config()
392 			dma_cfg->source_data_size);  in dma_gd32_config()
396 	if (dma_cfg->dest_data_size != 1 && dma_cfg->dest_data_size != 2 &&  in dma_gd32_config()
397 	    dma_cfg->dest_data_size != 4) {  in dma_gd32_config()
399 			dma_cfg->dest_data_size);  in dma_gd32_config()
403 	if (dma_cfg->channel_direction > PERIPHERAL_TO_MEMORY) {  in dma_gd32_config()
407 			dma_cfg->channel_direction);  in dma_gd32_config()
411 	if (dma_cfg->channel_direction == MEMORY_TO_MEMORY && !cfg->mem2mem) {  in dma_gd32_config()
417 	if (dma_cfg->dma_slot > 0xF) {  in dma_gd32_config()
419 			dma_cfg->dma_slot);  in dma_gd32_config()
426 	src_cfg.addr = dma_cfg->head_block->source_address;  in dma_gd32_config()
427 	src_cfg.adj = dma_cfg->head_block->source_addr_adj;  in dma_gd32_config()
428 	src_cfg.width = dma_cfg->source_data_size;  in dma_gd32_config()
430 	dst_cfg.addr = dma_cfg->head_block->dest_address;  in dma_gd32_config()
431 	dst_cfg.adj = dma_cfg->head_block->dest_addr_adj;  in dma_gd32_config()
432 	dst_cfg.width = dma_cfg->dest_data_size;  in dma_gd32_config()
434 	switch (dma_cfg->channel_direction) {  in dma_gd32_config()
467 					dma_cfg->head_block->block_size);  in dma_gd32_config()
469 				 dma_gd32_priority(dma_cfg->channel_priority));  in dma_gd32_config()
476 	if (dma_cfg->channel_direction != MEMORY_TO_MEMORY) {  in dma_gd32_config()
478 						      dma_cfg->dma_slot);  in dma_gd32_config()
482 	data->channels[channel].callback = dma_cfg->dma_callback;  in dma_gd32_config()
483 	data->channels[channel].user_data = dma_cfg->user_data;  in dma_gd32_config()
484 	data->channels[channel].direction = dma_cfg->channel_direction;  in dma_gd32_config()