Lines Matching refs:dw_read
39 status_intr = dw_read(dev_cfg->base, DW_INTR_STATUS); in dw_dma_isr()
45 status_block = dw_read(dev_cfg->base, DW_STATUS_BLOCK); in dw_dma_isr()
46 status_tfr = dw_read(dev_cfg->base, DW_STATUS_TFR); in dw_dma_isr()
49 status_err = dw_read(dev_cfg->base, DW_STATUS_ERR); in dw_dma_isr()
443 return dw_read(dev_cfg->base, DW_DMA_CHAN_EN) & DW_CHAN(channel); in dw_dma_is_enabled()
467 dw_read(dev_cfg->base, DW_DMA_CHAN_EN), chan_data->state); in dw_dma_start()
495 lli->ctrl_lo, masked_ctrl_lo, dw_read(dev_cfg->base, DW_LLP(channel))); in dw_dma_start()
520 chan_data->cfg_hi, dw_read(dev_cfg->base, DW_LLP(channel)) in dw_dma_start()
525 chan_data->cfg_hi, dw_read(dev_cfg->base, DW_LLP(channel)) in dw_dma_start()
599 bool fifo_empty = WAIT_FOR(dw_read(dev_cfg->base, DW_CFG_LOW(channel)) & DW_CFGL_FIFO_EMPTY, in dw_dma_stop()
615 bool is_disabled = WAIT_FOR(!(dw_read(dev_cfg->base, DW_DMA_CHAN_EN) & DW_CHAN(channel)), in dw_dma_stop()
707 if (dw_read(dev_cfg->base, DW_DMA_CFG) != 0) { in dw_dma_setup()
712 if (!dw_read(dev_cfg->base, DW_DMA_CFG)) { in dw_dma_setup()
726 dw_read(dev_cfg->base, DW_DMA_CHAN_EN); in dw_dma_setup()
763 int32_t write_ptr = dw_read(base, DW_DAR(channel)); in dw_dma_avail_data_size()
795 int32_t read_ptr = dw_read(base, DW_SAR(channel)); in dw_dma_free_data_size()
847 if (!(dw_read(dev_cfg->base, DW_DMA_CHAN_EN) & DW_CHAN(channel))) { in dw_dma_get_status()