209 			lli_desc->ctrl_lo |= DW_CTLL_SRC_WIDTH(0);  in dw_dma_config()
216 				lli_desc->ctrl_lo |= DW_CTLL_SRC_WIDTH(2);  in dw_dma_config()
220 				lli_desc->ctrl_lo |= DW_CTLL_SRC_WIDTH(1);  in dw_dma_config()
226 			lli_desc->ctrl_lo |= DW_CTLL_SRC_WIDTH(2);  in dw_dma_config()
236 			lli_desc, lli_desc->ctrl_lo);  in dw_dma_config()
241 			lli_desc->ctrl_lo |= DW_CTLL_DST_WIDTH(0);  in dw_dma_config()
248 				lli_desc->ctrl_lo |= DW_CTLL_DST_WIDTH(2);  in dw_dma_config()
252 				lli_desc->ctrl_lo |= DW_CTLL_DST_WIDTH(1);  in dw_dma_config()
258 			lli_desc->ctrl_lo |= DW_CTLL_DST_WIDTH(2);  in dw_dma_config()
268 			lli_desc, lli_desc->ctrl_lo);  in dw_dma_config()
270 		lli_desc->ctrl_lo |= DW_CTLL_SRC_MSIZE(msize) |  in dw_dma_config()
274 			lli_desc->ctrl_lo |= DW_CTLL_INT_EN; /* enable interrupt */  in dw_dma_config()
278 			lli_desc, lli_desc->ctrl_lo);  in dw_dma_config()
285 			lli_desc->ctrl_lo |= DW_CTLL_FC_M2M | DW_CTLL_SRC_INC |  in dw_dma_config()
289 				lli_desc->ctrl_lo);  in dw_dma_config()
290 			lli_desc->ctrl_lo |=  in dw_dma_config()
292 			LOG_DBG("%s: lli_desc->ctrl_lo %x", dev->name, lli_desc->ctrl_lo);  in dw_dma_config()
300 			lli_desc->ctrl_lo |= DW_CTLL_FC_M2P | DW_CTLL_SRC_INC |  in dw_dma_config()
303 			lli_desc->ctrl_lo |= DW_CTLL_LLP_S_EN;  in dw_dma_config()
315 			lli_desc->ctrl_lo |= DW_CTLL_FC_P2M | DW_CTLL_SRC_FIX |  in dw_dma_config()
319 				lli_desc->ctrl_lo |= DW_CTLL_LLP_D_EN;  in dw_dma_config()
324 				lli_desc->ctrl_lo |= DW_CTLL_D_SCAT_EN;  in dw_dma_config()
344 			lli_desc, lli_desc->ctrl_lo, chan_data->cfg_hi, chan_data->cfg_lo);  in dw_dma_config()
349 			dev->name, lli_desc, lli_desc->ctrl_lo, chan_data->cfg_hi,  in dw_dma_config()
364 			dev->name, lli_desc, lli_desc->ctrl_lo, chan_data->cfg_hi,  in dw_dma_config()
391 			lli_desc_tail->ctrl_lo);  in dw_dma_config()
392 		lli_desc_tail->ctrl_lo &= ~(DW_CTLL_LLP_S_EN | DW_CTLL_LLP_D_EN);  in dw_dma_config()
393 		LOG_DBG("%s: ctrl_lo %x", dev->name, lli_desc_tail->ctrl_lo);  in dw_dma_config()
486 	uint32_t masked_ctrl_lo = lli->ctrl_lo & (DW_CTLL_LLP_D_EN | DW_CTLL_LLP_S_EN);  in dw_dma_start()
495 		lli->ctrl_lo, masked_ctrl_lo, dw_read(dev_cfg->base, DW_LLP(channel)));  in dw_dma_start()
510 	dw_write(dev_cfg->base, DW_CTRL_LOW(channel), lli->ctrl_lo);  in dw_dma_start()
519 		dev->name, lli->sar, lli->dar, lli->ctrl_lo, lli->ctrl_hi, chan_data->cfg_lo,  in dw_dma_start()
524 		dev->name, lli->sar, lli->dar, lli->ctrl_lo, lli->ctrl_hi, chan_data->cfg_lo,  in dw_dma_start()
530 	if (lli->ctrl_lo & DW_CTLL_D_SCAT_EN) {  in dw_dma_start()
533 			((lli->ctrl_lo & DW_CTLL_DST_WIDTH_MASK) >> DW_CTLL_DST_WIDTH_SHIFT);  in dw_dma_start()