Lines Matching refs:sys_write64
320 sys_write64(DMA_DW_AXI_IRQ_ALL_ERR, in dma_dw_axi_isr()
329 sys_write64(DMA_DW_AXI_IRQ_ALL_ERR | DMA_DW_AXI_IRQ_BLOCK_TFR, in dma_dw_axi_isr()
340 sys_write64(DMA_DW_AXI_IRQ_ALL_ERR | DMA_DW_AXI_IRQ_DMA_TFR, in dma_dw_axi_isr()
667 sys_write64(DMA_DW_AXI_CFG_INT_EN | DMA_DW_AXI_CFG_EN, reg_base + DMA_DW_AXI_CFGREG); in dma_dw_axi_start()
669 sys_write64(chan_data->cfg, reg_base + DMA_DW_AXI_CH_CFG(channel)); in dma_dw_axi_start()
671 sys_write64(chan_data->irq_unmask, in dma_dw_axi_start()
673 sys_write64(chan_data->irq_unmask, in dma_dw_axi_start()
679 sys_write64(((uint64_t)lli_desc), reg_base + DMA_DW_AXI_CH_LLP(channel)); in dma_dw_axi_start()
682 sys_write64(lli_desc->sar, reg_base + DMA_DW_AXI_CH_SAR(channel)); in dma_dw_axi_start()
683 sys_write64(lli_desc->dar, reg_base + DMA_DW_AXI_CH_DAR(channel)); in dma_dw_axi_start()
685 sys_write64(lli_desc->block_ts_lo & BLOCK_TS_MASK, in dma_dw_axi_start()
689 sys_write64(lli_desc->ctl, reg_base + DMA_DW_AXI_CH_CTL(channel)); in dma_dw_axi_start()
693 sys_write64(CH_EN(channel), reg_base + DMA_DW_AXI_CHENREG); in dma_dw_axi_start()
728 sys_write64(CH_SUSP(channel), reg_base + DMA_DW_AXI_CHENREG); in dma_dw_axi_stop()
737 sys_write64(CH_ABORT(channel), reg_base + DMA_DW_AXI_CHENREG); in dma_dw_axi_stop()
776 sys_write64(reg, reg_base + DMA_DW_AXI_CHENREG); in dma_dw_axi_resume()
802 sys_write64(CH_SUSP(channel), reg_base + DMA_DW_AXI_CHENREG); in dma_dw_axi_suspend()