Lines Matching refs:sys_write32

159 	sys_write32(int_status, DMA_INT_STATUS(dev));  in dma_atcdmac300_isr()
290 sys_write32(0, DMA_CH_CTRL(dev, channel)); in dma_atcdmac300_config()
294 sys_write32(DMA_INT_STATUS_CH_MSK(channel), DMA_INT_STATUS(dev)); in dma_atcdmac300_config()
298 sys_write32(tfr_size, DMA_CH_TRANSIZE(dev, channel)); in dma_atcdmac300_config()
311 sys_write32(ch_ctrl, DMA_CH_CTRL(dev, channel)); in dma_atcdmac300_config()
314 sys_write32(cfg_blocks->source_address, in dma_atcdmac300_config()
316 sys_write32(0, DMA_CH_SRC_ADDR_H(dev, channel)); in dma_atcdmac300_config()
317 sys_write32(cfg_blocks->dest_address, in dma_atcdmac300_config()
319 sys_write32(0, DMA_CH_DST_ADDR_H(dev, channel)); in dma_atcdmac300_config()
324 sys_write32((uint32_t)((long)&dma_chain[channel][current_block_idx]), in dma_atcdmac300_config()
326 sys_write32(0, DMA_CH_LL_PTR_H(dev, channel)); in dma_atcdmac300_config()
392 sys_write32(0, DMA_CH_LL_PTR_L(dev, channel)); in dma_atcdmac300_config()
393 sys_write32(0, DMA_CH_LL_PTR_H(dev, channel)); in dma_atcdmac300_config()
410 sys_write32(src, DMA_CH_SRC_ADDR_L(dev, channel)); in dma_atcdmac300_reload()
411 sys_write32(0, DMA_CH_SRC_ADDR_H(dev, channel)); in dma_atcdmac300_reload()
412 sys_write32(dst, DMA_CH_DST_ADDR_L(dev, channel)); in dma_atcdmac300_reload()
413 sys_write32(0, DMA_CH_DST_ADDR_H(dev, channel)); in dma_atcdmac300_reload()
419 sys_write32(size/src_width, DMA_CH_TRANSIZE(dev, channel)); in dma_atcdmac300_reload()
433 sys_write32(sys_read32(DMA_CH_CTRL(dev, channel)) | DMA_CH_CTRL_ENABLE, in dma_atcdmac300_transfer_start()
453 sys_write32(BIT(channel), DMA_ABORT(dev)); in dma_atcdmac300_transfer_stop()
454 sys_write32(0, DMA_CH_CTRL(dev, channel)); in dma_atcdmac300_transfer_stop()
455 sys_write32(FIELD_GET(DMA_INT_STATUS_ABORT_MASK, (channel)), DMA_INT_STATUS(dev)); in dma_atcdmac300_transfer_stop()
470 sys_write32(0, DMA_CH_CTRL(dev, ch_num)); in dma_atcdmac300_init()
473 sys_write32(0xFFFFFF, DMA_INT_STATUS(dev)); in dma_atcdmac300_init()