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31 #define NVME_CAP_LO_REG_CQR_MASK (0x1)
48 #define NVME_CAP_HI_REG_NSSRS_MASK (0x1)
52 #define NVME_CAP_HI_REG_CSS_NVM_MASK (0x1)
54 #define NVME_CAP_HI_REG_BPS_MASK (0x1)
60 #define NVME_CAP_HI_REG_PMRS_MASK (0x1)
62 #define NVME_CAP_HI_REG_CMBS_MASK (0x1)
83 #define NVME_CC_REG_EN_MASK (0x1)
98 #define NVME_CSTS_REG_RDY_MASK (0x1)
100 #define NVME_CSTS_REG_CFS_MASK (0x1)
104 #define NVME_CSTS_REG_NVSRO_MASK (0x1)
106 #define NVME_CSTS_REG_PP_MASK (0x1)
117 #define NVME_PMRCAP_REG_RDS_MASK (0x1)
119 #define NVME_PMRCAP_REG_WDS_MASK (0x1)
129 #define NVME_PMRCAP_REG_CMSS_MASK (0x1)
152 #define NVME_STATUS_P_MASK (0x1)
160 #define NVME_STATUS_M_MASK (0x1)
162 #define NVME_STATUS_DNR_MASK (0x1)
180 #define NVME_CTRLR_DATA_MIC_MPORTS_MASK (0x1)
183 #define NVME_CTRLR_DATA_MIC_MCTRLRS_MASK (0x1)
186 #define NVME_CTRLR_DATA_MIC_SRIOVVF_MASK (0x1)
189 #define NVME_CTRLR_DATA_MIC_ANAR_MASK (0x1)
194 #define NVME_CTRLR_DATA_OAES_NS_ATTR_MASK (0x1)
197 #define NVME_CTRLR_DATA_OAES_FW_ACTIVATE_MASK (0x1)
200 #define NVME_CTRLR_DATA_OAES_ASYM_NS_CHANGE_MASK (0x1)
203 #define NVME_CTRLR_DATA_OAES_PREDICT_LATENCY_MASK (0x1)
206 #define NVME_CTRLR_DATA_OAES_LBA_STATUS_MASK (0x1)
209 #define NVME_CTRLR_DATA_OAES_ENDURANCE_GROUP_MASK (0x1)
212 #define NVME_CTRLR_DATA_OAES_NORMAL_SHUTDOWN_MASK (0x1)
215 #define NVME_CTRLR_DATA_OAES_ZONE_DESC_CHANGE_MASK (0x1)
218 #define NVME_CTRLR_DATA_OAES_LOG_PAGE_CHANGE_MASK (0x1)
223 #define NVME_CTRLR_DATA_OACS_SECURITY_MASK (0x1)
226 #define NVME_CTRLR_DATA_OACS_FORMAT_MASK (0x1)
229 #define NVME_CTRLR_DATA_OACS_FIRMWARE_MASK (0x1)
232 #define NVME_CTRLR_DATA_OACS_NSMGMT_MASK (0x1)
235 #define NVME_CTRLR_DATA_OACS_SELFTEST_MASK (0x1)
238 #define NVME_CTRLR_DATA_OACS_DIRECTIVES_MASK (0x1)
241 #define NVME_CTRLR_DATA_OACS_NVMEMI_MASK (0x1)
244 #define NVME_CTRLR_DATA_OACS_VM_MASK (0x1)
247 #define NVME_CTRLR_DATA_OACS_DBBUFFER_MASK (0x1)
250 #define NVME_CTRLR_DATA_OACS_GETLBA_MASK (0x1)
255 #define NVME_CTRLR_DATA_FRMW_SLOT1_RO_MASK (0x1)
261 #define NVME_CTRLR_DATA_FRMW_ACT_WO_RESET_MASK (0x1)
266 #define NVME_CTRLR_DATA_LPA_NS_SMART_MASK (0x1)
271 #define NVME_CTRLR_DATA_AVSCC_SPEC_FORMAT_MASK (0x1)
276 #define NVME_CTRLR_DATA_APSTA_APST_SUPP_MASK (0x1)
281 #define NVME_CTRLR_DATA_SANICAP_CES_MASK (0x1)
284 #define NVME_CTRLR_DATA_SANICAP_BES_MASK (0x1)
287 #define NVME_CTRLR_DATA_SANICAP_OWS_MASK (0x1)
290 #define NVME_CTRLR_DATA_SANICAP_NDI_MASK (0x1)
312 #define NVME_CTRLR_DATA_ONCS_COMPARE_MASK (0x1)
314 #define NVME_CTRLR_DATA_ONCS_WRITE_UNC_MASK (0x1)
316 #define NVME_CTRLR_DATA_ONCS_DSM_MASK (0x1)
318 #define NVME_CTRLR_DATA_ONCS_WRZERO_MASK (0x1)
320 #define NVME_CTRLR_DATA_ONCS_SAVEFEAT_MASK (0x1)
322 #define NVME_CTRLR_DATA_ONCS_RESERV_MASK (0x1)
324 #define NVME_CTRLR_DATA_ONCS_TIMESTAMP_MASK (0x1)
326 #define NVME_CTRLR_DATA_ONCS_VERIFY_MASK (0x1)
330 #define NVME_CTRLR_DATA_FUSES_CNW_MASK (0x1)
334 #define NVME_CTRLR_DATA_FNA_FORMAT_ALL_MASK (0x1)
336 #define NVME_CTRLR_DATA_FNA_ERASE_ALL_MASK (0x1)
338 #define NVME_CTRLR_DATA_FNA_CRYPTO_ERASE_MASK (0x1)
343 #define NVME_CTRLR_DATA_VWC_PRESENT_MASK (0x1)
354 #define NVME_NS_DATA_NSFEAT_THIN_PROV_MASK (0x1)
357 #define NVME_NS_DATA_NSFEAT_NA_FIELDS_MASK (0x1)
360 #define NVME_NS_DATA_NSFEAT_DEALLOC_MASK (0x1)
363 #define NVME_NS_DATA_NSFEAT_NO_ID_REUSE_MASK (0x1)
366 #define NVME_NS_DATA_NSFEAT_NPVALID_MASK (0x1)
372 #define NVME_NS_DATA_FLBAS_EXTENDED_MASK (0x1)
377 #define NVME_NS_DATA_MC_EXTENDED_MASK (0x1)
380 #define NVME_NS_DATA_MC_POINTER_MASK (0x1)
385 #define NVME_NS_DATA_DPC_PIT1_MASK (0x1)
388 #define NVME_NS_DATA_DPC_PIT2_MASK (0x1)
391 #define NVME_NS_DATA_DPC_PIT3_MASK (0x1)
394 #define NVME_NS_DATA_DPC_MD_START_MASK (0x1)
397 #define NVME_NS_DATA_DPC_MD_END_MASK (0x1)
406 #define NVME_NS_DATA_DPS_MD_START_MASK (0x1)
411 #define NVME_NS_DATA_NMIC_MAY_BE_SHARED_MASK (0x1)
416 #define NVME_NS_DATA_RESCAP_PTPL_MASK (0x1)
419 #define NVME_NS_DATA_RESCAP_WR_EX_MASK (0x1)
422 #define NVME_NS_DATA_RESCAP_EX_AC_MASK (0x1)
425 #define NVME_NS_DATA_RESCAP_WR_EX_RO_MASK (0x1)
428 #define NVME_NS_DATA_RESCAP_EX_AC_RO_MASK (0x1)
431 #define NVME_NS_DATA_RESCAP_WR_EX_AR_MASK (0x1)
434 #define NVME_NS_DATA_RESCAP_EX_AC_AR_MASK (0x1)
437 #define NVME_NS_DATA_RESCAP_IEKEY13_MASK (0x1)
445 #define NVME_NS_DATA_FPI_SUPP_MASK (0x1)
473 NVME_CRIT_WARN_ST_AVAILABLE_SPARE = 0x1,
489 NVME_SHN_NORMAL = 0x1,
496 NVME_SHST_OCCURRING = 0x1,