Lines Matching refs:dp
116 static void dai_ssp_update_bits(struct dai_intel_ssp *dp, uint32_t reg, uint32_t mask, uint32_t val) in dai_ssp_update_bits() argument
118 uint32_t dest = dai_base(dp) + reg; in dai_ssp_update_bits()
120 LOG_DBG("base %x, reg %x, mask %x, value %x", dai_base(dp), reg, mask, val); in dai_ssp_update_bits()
190 static bool dai_ssp_is_mclk_source_in_use(struct dai_intel_ssp *dp) in dai_ssp_is_mclk_source_in_use() argument
192 struct dai_intel_ssp_mn *mp = dai_get_mn(dp); in dai_ssp_is_mclk_source_in_use()
213 static int dai_ssp_setup_initial_mclk_source(struct dai_intel_ssp *dp, uint32_t mclk_id, in dai_ssp_setup_initial_mclk_source() argument
216 struct dai_intel_ssp_freq_table *ft = dai_get_ftable(dp); in dai_ssp_setup_initial_mclk_source()
217 uint32_t *fs = dai_get_fsources(dp); in dai_ssp_setup_initial_mclk_source()
218 struct dai_intel_ssp_mn *mp = dai_get_mn(dp); in dai_ssp_setup_initial_mclk_source()
247 mdivc = sys_read32(dai_mn_base(dp) + MN_MDIVCTRL); in dai_ssp_setup_initial_mclk_source()
258 sys_write32(mdivc, dai_mn_base(dp) + MN_MDIVCTRL); in dai_ssp_setup_initial_mclk_source()
271 static int dai_ssp_check_current_mclk_source(struct dai_intel_ssp *dp, uint16_t mclk_id, in dai_ssp_check_current_mclk_source() argument
274 struct dai_intel_ssp_freq_table *ft = dai_get_ftable(dp); in dai_ssp_check_current_mclk_source()
275 struct dai_intel_ssp_mn *mp = dai_get_mn(dp); in dai_ssp_check_current_mclk_source()
297 mdivc = sys_read32(dai_mn_base(dp) + MN_MDIVCTRL); in dai_ssp_check_current_mclk_source()
301 sys_write32(mdivc, dai_mn_base(dp) + MN_MDIVCTRL); in dai_ssp_check_current_mclk_source()
315 static int dai_ssp_set_mclk_divider(struct dai_intel_ssp *dp, uint16_t mclk_id, uint32_t mdivr_val) in dai_ssp_set_mclk_divider() argument
332 sys_write32(mdivr, dai_mn_base(dp) + MN_MDIVR(mclk_id)); in dai_ssp_set_mclk_divider()
337 static int dai_ssp_mn_set_mclk(struct dai_intel_ssp *dp, uint16_t mclk_id, uint32_t mclk_rate) in dai_ssp_mn_set_mclk() argument
339 struct dai_intel_ssp_freq_table *ft = dai_get_ftable(dp); in dai_ssp_mn_set_mclk()
340 struct dai_intel_ssp_mn *mp = dai_get_mn(dp); in dai_ssp_mn_set_mclk()
351 if (dai_ssp_is_mclk_source_in_use(dp)) { in dai_ssp_mn_set_mclk()
352 ret = dai_ssp_check_current_mclk_source(dp, mclk_id, mclk_rate); in dai_ssp_mn_set_mclk()
354 ret = dai_ssp_setup_initial_mclk_source(dp, mclk_id, mclk_rate); in dai_ssp_mn_set_mclk()
363 ret = dai_ssp_set_mclk_divider(dp, mclk_id, ft[mp->mclk_source_clock].freq / mclk_rate); in dai_ssp_mn_set_mclk()
374 static int dai_ssp_mn_set_mclk_blob(struct dai_intel_ssp *dp, uint32_t mdivc, uint32_t mdivr) in dai_ssp_mn_set_mclk_blob() argument
376 sys_write32(mdivc, dai_mn_base(dp) + MN_MDIVCTRL); in dai_ssp_mn_set_mclk_blob()
377 sys_write32(mdivr, dai_mn_base(dp) + MN_MDIVR(0)); in dai_ssp_mn_set_mclk_blob()
382 static void dai_ssp_mn_release_mclk(struct dai_intel_ssp *dp, uint32_t mclk_id) in dai_ssp_mn_release_mclk() argument
384 struct dai_intel_ssp_mn *mp = dai_get_mn(dp); in dai_ssp_mn_release_mclk()
394 mdivc = sys_read32(dai_mn_base(dp) + MN_MDIVCTRL); in dai_ssp_mn_release_mclk()
397 sys_write32(mdivc, dai_mn_base(dp) + MN_MDIVCTRL); in dai_ssp_mn_release_mclk()
401 if (!dai_ssp_is_mclk_source_in_use(dp)) { in dai_ssp_mn_release_mclk()
402 mdivc = sys_read32(dai_mn_base(dp) + MN_MDIVCTRL); in dai_ssp_mn_release_mclk()
407 sys_write32(mdivc, dai_mn_base(dp) + MN_MDIVCTRL); in dai_ssp_mn_release_mclk()
487 static int dai_ssp_find_bclk_source(struct dai_intel_ssp *dp, uint32_t bclk, uint32_t *scr_div, in dai_ssp_find_bclk_source() argument
490 struct dai_intel_ssp_freq_table *ft = dai_get_ftable(dp); in dai_ssp_find_bclk_source()
491 struct dai_intel_ssp_mn *mp = dai_get_mn(dp); in dai_ssp_find_bclk_source()
495 if (dai_ssp_is_mclk_source_in_use(dp)) { in dai_ssp_find_bclk_source()
526 static int dai_ssp_find_clk_ssp_index(struct dai_intel_ssp *dp, uint32_t src_enc) in dai_ssp_find_clk_ssp_index() argument
528 uint32_t *fs = dai_get_fsources(dp); in dai_ssp_find_clk_ssp_index()
546 static bool dai_ssp_is_bclk_source_in_use(struct dai_intel_ssp *dp, enum bclk_source clk_src) in dai_ssp_is_bclk_source_in_use() argument
548 struct dai_intel_ssp_mn *mp = dai_get_mn(dp); in dai_ssp_is_bclk_source_in_use()
572 static int dai_ssp_setup_initial_bclk_mn_source(struct dai_intel_ssp *dp, uint32_t bclk, in dai_ssp_setup_initial_bclk_mn_source() argument
575 uint32_t *fs = dai_get_fsources(dp); in dai_ssp_setup_initial_bclk_mn_source()
576 struct dai_intel_ssp_mn *mp = dai_get_mn(dp); in dai_ssp_setup_initial_bclk_mn_source()
578 int clk_index = dai_ssp_find_bclk_source(dp, bclk, scr_div, m, n); in dai_ssp_setup_initial_bclk_mn_source()
587 mdivc = sys_read32(dai_mn_base(dp) + MN_MDIVCTRL); in dai_ssp_setup_initial_bclk_mn_source()
595 sys_write32(mdivc, dai_mn_base(dp) + MN_MDIVCTRL); in dai_ssp_setup_initial_bclk_mn_source()
605 static void dai_ssp_reset_bclk_mn_source(struct dai_intel_ssp *dp) in dai_ssp_reset_bclk_mn_source() argument
607 struct dai_intel_ssp_mn *mp = dai_get_mn(dp); in dai_ssp_reset_bclk_mn_source()
609 int clk_index = dai_ssp_find_clk_ssp_index(dp, DAI_INTEL_SSP_CLOCK_XTAL_OSCILLATOR); in dai_ssp_reset_bclk_mn_source()
616 mdivc = sys_read32(dai_mn_base(dp) + MN_MDIVCTRL); in dai_ssp_reset_bclk_mn_source()
622 sys_write32(mdivc, dai_mn_base(dp) + MN_MDIVCTRL); in dai_ssp_reset_bclk_mn_source()
636 static int dai_ssp_setup_current_bclk_mn_source(struct dai_intel_ssp *dp, uint32_t bclk, in dai_ssp_setup_current_bclk_mn_source() argument
639 struct dai_intel_ssp_freq_table *ft = dai_get_ftable(dp); in dai_ssp_setup_current_bclk_mn_source()
640 struct dai_intel_ssp_mn *mp = dai_get_mn(dp); in dai_ssp_setup_current_bclk_mn_source()
664 static int dai_ssp_mn_set_bclk(struct dai_intel_ssp *dp, uint32_t dai_index, uint32_t bclk_rate, in dai_ssp_mn_set_bclk() argument
667 struct dai_intel_ssp_mn *mp = dai_get_mn(dp); in dai_ssp_mn_set_bclk()
678 mn_in_use = dai_ssp_is_bclk_source_in_use(dp, MN_BCLK_SOURCE_MN); in dai_ssp_mn_set_bclk()
689 ret = dai_ssp_setup_current_bclk_mn_source(dp, bclk_rate, out_scr_div, &m, &n); in dai_ssp_mn_set_bclk()
691 ret = dai_ssp_setup_initial_bclk_mn_source(dp, bclk_rate, out_scr_div, &m, &n); in dai_ssp_mn_set_bclk()
699 sys_write32(m, dai_mn_base(dp) + MN_MDIV_M_VAL(dai_index)); in dai_ssp_mn_set_bclk()
700 sys_write32(n, dai_mn_base(dp) + MN_MDIV_N_VAL(dai_index)); in dai_ssp_mn_set_bclk()
710 static void dai_ssp_mn_release_bclk(struct dai_intel_ssp *dp, uint32_t ssp_index) in dai_ssp_mn_release_bclk() argument
712 struct dai_intel_ssp_mn *mp = dai_get_mn(dp); in dai_ssp_mn_release_bclk()
719 mn_in_use = dai_ssp_is_bclk_source_in_use(dp, MN_BCLK_SOURCE_MN); in dai_ssp_mn_release_bclk()
722 dai_ssp_reset_bclk_mn_source(dp); in dai_ssp_mn_release_bclk()
728 static void dai_ssp_mn_reset_bclk_divider(struct dai_intel_ssp *dp, uint32_t ssp_index) in dai_ssp_mn_reset_bclk_divider() argument
730 struct dai_intel_ssp_mn *mp = dai_get_mn(dp); in dai_ssp_mn_reset_bclk_divider()
735 sys_write32(1, dai_mn_base(dp) + MN_MDIV_M_VAL(ssp_index)); in dai_ssp_mn_reset_bclk_divider()
736 sys_write32(1, dai_mn_base(dp) + MN_MDIV_N_VAL(ssp_index)); in dai_ssp_mn_reset_bclk_divider()
753 static inline void dai_ssp_pm_runtime_dis_ssp_clk_gating(struct dai_intel_ssp *dp, in dai_ssp_pm_runtime_dis_ssp_clk_gating() argument
759 shim_reg = sys_read32(dai_shim_base(dp) + SHIM_CLKCTL) | in dai_ssp_pm_runtime_dis_ssp_clk_gating()
765 sys_write32(shim_reg, dai_shim_base(dp) + SHIM_CLKCTL); in dai_ssp_pm_runtime_dis_ssp_clk_gating()
771 static inline void dai_ssp_pm_runtime_en_ssp_clk_gating(struct dai_intel_ssp *dp, in dai_ssp_pm_runtime_en_ssp_clk_gating() argument
777 shim_reg = sys_read32(dai_shim_base(dp) + SHIM_CLKCTL) & in dai_ssp_pm_runtime_en_ssp_clk_gating()
783 sys_write32(shim_reg, dai_shim_base(dp) + SHIM_CLKCTL); in dai_ssp_pm_runtime_en_ssp_clk_gating()
789 static void dai_ssp_pm_runtime_en_ssp_power(struct dai_intel_ssp *dp, uint32_t ssp_index) in dai_ssp_pm_runtime_en_ssp_power() argument
796 sys_write32(sys_read32(dai_ip_base(dp) + I2SLCTL_OFFSET) | I2SLCTL_SPA(ssp_index), in dai_ssp_pm_runtime_en_ssp_power()
797 dai_ip_base(dp) + I2SLCTL_OFFSET); in dai_ssp_pm_runtime_en_ssp_power()
800 ret = dai_ssp_poll_for_register_delay(dai_ip_base(dp) + I2SLCTL_OFFSET, in dai_ssp_pm_runtime_en_ssp_power()
804 sys_write32(sys_read32(dai_hdamlssp_base(dp) + I2SLCTL_OFFSET) | in dai_ssp_pm_runtime_en_ssp_power()
806 dai_hdamlssp_base(dp) + I2SLCTL_OFFSET); in dai_ssp_pm_runtime_en_ssp_power()
808 ret = dai_ssp_poll_for_register_delay(dai_hdamlssp_base(dp) + I2SLCTL_OFFSET, in dai_ssp_pm_runtime_en_ssp_power()
818 ARG_UNUSED(dp); in dai_ssp_pm_runtime_en_ssp_power()
823 static void dai_ssp_pm_runtime_dis_ssp_power(struct dai_intel_ssp *dp, uint32_t ssp_index) in dai_ssp_pm_runtime_dis_ssp_power() argument
830 sys_write32(sys_read32(dai_ip_base(dp) + I2SLCTL_OFFSET) & (~I2SLCTL_SPA(ssp_index)), in dai_ssp_pm_runtime_dis_ssp_power()
831 dai_ip_base(dp) + I2SLCTL_OFFSET); in dai_ssp_pm_runtime_dis_ssp_power()
834 ret = dai_ssp_poll_for_register_delay(dai_ip_base(dp) + I2SLCTL_OFFSET, in dai_ssp_pm_runtime_dis_ssp_power()
839 sys_write32(sys_read32(dai_hdamlssp_base(dp) + I2SLCTL_OFFSET) & (~I2SLCTL_SPA(ssp_index)), in dai_ssp_pm_runtime_dis_ssp_power()
840 dai_hdamlssp_base(dp) + I2SLCTL_OFFSET); in dai_ssp_pm_runtime_dis_ssp_power()
843 ret = dai_ssp_poll_for_register_delay(dai_hdamlssp_base(dp) + I2SLCTL_OFFSET, in dai_ssp_pm_runtime_dis_ssp_power()
853 ARG_UNUSED(dp); in dai_ssp_pm_runtime_dis_ssp_power()
858 static void dai_ssp_program_channel_map(struct dai_intel_ssp *dp, in dai_ssp_program_channel_map() argument
865 pcmsycm = pcmsycm | (dp->ssp_plat_data->params.tdm_slots - 1) << 4; in dai_ssp_program_channel_map()
868 uint32_t reg_add = dai_ip_base(dp) + 0x1000 * ssp_index + PCMS0CM_OFFSET; in dai_ssp_program_channel_map()
872 uint32_t reg_add = dai_ip_base(dp) + 0x1000 * ssp_index + PCMS1CM_OFFSET; in dai_ssp_program_channel_map()
893 uint32_t reg_add = dai_ip_base(dp) + 0x1000 * ssp_index + in dai_ssp_program_channel_map()
909 uint32_t reg_add = dai_ip_base(dp) + 0x1000 * ssp_index + in dai_ssp_program_channel_map()
916 ARG_UNUSED(dp); in dai_ssp_program_channel_map()
924 static void dai_ssp_empty_tx_fifo(struct dai_intel_ssp *dp) in dai_ssp_empty_tx_fifo() argument
934 ret = dai_ssp_poll_for_register_delay(dai_base(dp) + SSMODyCS(dp->tdm_slot_group), in dai_ssp_empty_tx_fifo()
938 ret |= dai_ssp_poll_for_register_delay(dai_base(dp) + SSMODyCS(dp->tdm_slot_group), in dai_ssp_empty_tx_fifo()
943 ret = dai_ssp_poll_for_register_delay(dai_base(dp) + SSSR, SSSR_TNF, SSSR_TNF, in dai_ssp_empty_tx_fifo()
945 ret |= dai_ssp_poll_for_register_delay(dai_base(dp) + SSCR3, SSCR3_TFL_MASK, 0, in dai_ssp_empty_tx_fifo()
954 sssr = sys_read32(dai_base(dp) + SSSR); in dai_ssp_empty_tx_fifo()
958 sys_write32(sssr, dai_base(dp) + SSSR); in dai_ssp_empty_tx_fifo()
963 static void ssp_empty_rx_fifo_on_start(struct dai_intel_ssp *dp) in ssp_empty_rx_fifo_on_start() argument
968 sssr = sys_read32(dai_base(dp) + SSSR); in ssp_empty_rx_fifo_on_start()
974 sys_read32(dai_base(dp) + SSMIDyD(idx)); in ssp_empty_rx_fifo_on_start()
979 dai_ssp_update_bits(dp, SSSR, SSSR_ROR, SSSR_ROR); in ssp_empty_rx_fifo_on_start()
981 sssr = sys_read32(dai_base(dp) + SSSR); in ssp_empty_rx_fifo_on_start()
985 while ((sys_read32(dai_base(dp) + SSMIDyCS(idx)) & SSMIDyCS_RNE) && retry--) { in ssp_empty_rx_fifo_on_start()
986 uint32_t entries = SSMIDyCS_RFL_VAL(sys_read32(dai_base(dp) + in ssp_empty_rx_fifo_on_start()
991 sys_read32(dai_base(dp) + SSMIDyD(idx)); in ssp_empty_rx_fifo_on_start()
994 sssr = sys_read32(dai_base(dp) + SSSR); in ssp_empty_rx_fifo_on_start()
999 static void ssp_empty_rx_fifo_on_stop(struct dai_intel_ssp *dp) in ssp_empty_rx_fifo_on_stop() argument
1001 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in ssp_empty_rx_fifo_on_stop()
1008 sssr = sys_read32(dai_base(dp) + SSSR); in ssp_empty_rx_fifo_on_stop()
1010 entries[0] = SSMIDyCS_RFL_VAL(sys_read32(dai_base(dp) + SSMIDyCS(dp->tdm_slot_group))); in ssp_empty_rx_fifo_on_stop()
1012 while ((sys_read32(dai_base(dp) + SSMIDyCS(dp->tdm_slot_group)) & in ssp_empty_rx_fifo_on_stop()
1017 entries[1] = SSMIDyCS_RFL_VAL(sys_read32(dai_base(dp) + in ssp_empty_rx_fifo_on_stop()
1018 SSMIDyCS(dp->tdm_slot_group))); in ssp_empty_rx_fifo_on_stop()
1019 sssr = sys_read32(dai_base(dp) + SSSR); in ssp_empty_rx_fifo_on_stop()
1020 ssmidycs = sys_read32(dai_base(dp) + SSMIDyCS(dp->tdm_slot_group)); in ssp_empty_rx_fifo_on_stop()
1035 sys_read32(dai_base(dp) + SSMIDyD(dp->tdm_slot_group)); in ssp_empty_rx_fifo_on_stop()
1038 sssr = sys_read32(dai_base(dp) + SSSR); in ssp_empty_rx_fifo_on_stop()
1042 dai_ssp_update_bits(dp, SSSR, SSSR_ROR, SSSR_ROR); in ssp_empty_rx_fifo_on_stop()
1046 static void ssp_empty_rx_fifo_on_start(struct dai_intel_ssp *dp) in ssp_empty_rx_fifo_on_start() argument
1051 sssr = sys_read32(dai_base(dp) + SSSR); in ssp_empty_rx_fifo_on_start()
1056 sys_read32(dai_base(dp) + SSDR); in ssp_empty_rx_fifo_on_start()
1060 dai_ssp_update_bits(dp, SSSR, SSSR_ROR, SSSR_ROR); in ssp_empty_rx_fifo_on_start()
1062 sssr = sys_read32(dai_base(dp) + SSSR); in ssp_empty_rx_fifo_on_start()
1066 uint32_t entries = SSCR3_RFL_VAL(sys_read32(dai_base(dp) + SSCR3)); in ssp_empty_rx_fifo_on_start()
1070 sys_read32(dai_base(dp) + SSDR); in ssp_empty_rx_fifo_on_start()
1073 sssr = sys_read32(dai_base(dp) + SSSR); in ssp_empty_rx_fifo_on_start()
1077 static void ssp_empty_rx_fifo_on_stop(struct dai_intel_ssp *dp) in ssp_empty_rx_fifo_on_stop() argument
1079 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in ssp_empty_rx_fifo_on_stop()
1086 sssr = sys_read32(dai_base(dp) + SSSR); in ssp_empty_rx_fifo_on_stop()
1087 entries[0] = SSCR3_RFL_VAL(sys_read32(dai_base(dp) + SSCR3)); in ssp_empty_rx_fifo_on_stop()
1093 entries[1] = SSCR3_RFL_VAL(sys_read32(dai_base(dp) + SSCR3)); in ssp_empty_rx_fifo_on_stop()
1094 sssr = sys_read32(dai_base(dp) + SSSR); in ssp_empty_rx_fifo_on_stop()
1109 sys_read32(dai_base(dp) + SSDR); in ssp_empty_rx_fifo_on_stop()
1113 sssr = sys_read32(dai_base(dp) + SSSR); in ssp_empty_rx_fifo_on_stop()
1117 dai_ssp_update_bits(dp, SSSR, SSSR_ROR, SSSR_ROR); in ssp_empty_rx_fifo_on_stop()
1122 static int dai_ssp_mclk_prepare_enable(struct dai_intel_ssp *dp) in dai_ssp_mclk_prepare_enable() argument
1124 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_mclk_prepare_enable()
1132 ret = dai_ssp_mn_set_mclk(dp, ssp_plat_data->params.mclk_id, in dai_ssp_mclk_prepare_enable()
1144 static void dai_ssp_mclk_disable_unprepare(struct dai_intel_ssp *dp) in dai_ssp_mclk_disable_unprepare() argument
1146 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_mclk_disable_unprepare()
1152 dai_ssp_mn_release_mclk(dp, ssp_plat_data->params.mclk_id); in dai_ssp_mclk_disable_unprepare()
1157 static int dai_ssp_bclk_prepare_enable(struct dai_intel_ssp *dp) in dai_ssp_bclk_prepare_enable() argument
1160 struct dai_intel_ssp_freq_table *ft = dai_get_ftable(dp); in dai_ssp_bclk_prepare_enable()
1162 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_bclk_prepare_enable()
1171 sscr0 = sys_read32(dai_base(dp) + SSCR0); in dai_ssp_bclk_prepare_enable()
1176 ret = dai_ssp_mn_set_bclk(dp, dp->dai_index, ssp_plat_data->params.bclk_rate, in dai_ssp_bclk_prepare_enable()
1180 ssp_plat_data->params.bclk_rate, dp->dai_index); in dai_ssp_bclk_prepare_enable()
1186 ssp_plat_data->params.bclk_rate, dp->dai_index); in dai_ssp_bclk_prepare_enable()
1214 sys_write32(sscr0, dai_base(dp) + SSCR0); in dai_ssp_bclk_prepare_enable()
1225 static void dai_ssp_bclk_disable_unprepare(struct dai_intel_ssp *dp) in dai_ssp_bclk_disable_unprepare() argument
1227 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_bclk_disable_unprepare()
1233 dai_ssp_mn_release_bclk(dp, ssp_plat_data->ssp_index); in dai_ssp_bclk_disable_unprepare()
1238 static void dai_ssp_log_ssp_data(struct dai_intel_ssp *dp) in dai_ssp_log_ssp_data() argument
1240 LOG_INF("dai index: %u", dp->dai_index); in dai_ssp_log_ssp_data()
1241 LOG_INF("plat_data base: %u", dp->ssp_plat_data->base); in dai_ssp_log_ssp_data()
1242 LOG_INF("plat_data irq: %u", dp->ssp_plat_data->irq); in dai_ssp_log_ssp_data()
1244 dp->ssp_plat_data->fifo[DAI_DIR_PLAYBACK].offset); in dai_ssp_log_ssp_data()
1246 dp->ssp_plat_data->fifo[DAI_DIR_PLAYBACK].handshake); in dai_ssp_log_ssp_data()
1248 dp->ssp_plat_data->fifo[DAI_DIR_CAPTURE].offset); in dai_ssp_log_ssp_data()
1250 dp->ssp_plat_data->fifo[DAI_DIR_CAPTURE].handshake); in dai_ssp_log_ssp_data()
1254 static int dai_ssp_set_config_tplg(struct dai_intel_ssp *dp, const struct dai_config *config, in dai_ssp_set_config_tplg() argument
1257 struct dai_intel_ssp_pdata *ssp = dai_get_drvdata(dp); in dai_ssp_set_config_tplg()
1258 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_set_config_tplg()
1259 struct dai_intel_ssp_freq_table *ft = dai_get_ftable(dp); in dai_ssp_set_config_tplg()
1289 dai_ssp_log_ssp_data(dp); in dai_ssp_set_config_tplg()
1291 key = k_spin_lock(&dp->lock); in dai_ssp_set_config_tplg()
1294 if (dp->state[DAI_DIR_PLAYBACK] > DAI_STATE_READY || in dai_ssp_set_config_tplg()
1295 dp->state[DAI_DIR_CAPTURE] > DAI_STATE_READY) { in dai_ssp_set_config_tplg()
1311 LOG_INF("SSP%d", dp->dai_index); in dai_ssp_set_config_tplg()
1719 sys_write32(sscr0, dai_base(dp) + SSCR0); in dai_ssp_set_config_tplg()
1720 sys_write32(sscr1, dai_base(dp) + SSCR1); in dai_ssp_set_config_tplg()
1721 sys_write32(sscr2, dai_base(dp) + SSCR2); in dai_ssp_set_config_tplg()
1722 sys_write32(sscr3, dai_base(dp) + SSCR3); in dai_ssp_set_config_tplg()
1723 sys_write32(sspsp, dai_base(dp) + SSPSP); in dai_ssp_set_config_tplg()
1724 sys_write32(sspsp2, dai_base(dp) + SSPSP2); in dai_ssp_set_config_tplg()
1725 sys_write32(ssioc, dai_base(dp) + SSIOC); in dai_ssp_set_config_tplg()
1726 sys_write32(ssto, dai_base(dp) + SSTO); in dai_ssp_set_config_tplg()
1730 sys_write64(sstsa, dai_base(dp) + SSMODyTSA(idx)); in dai_ssp_set_config_tplg()
1734 sys_write64(ssrsa, dai_base(dp) + SSMIDyTSA(idx)); in dai_ssp_set_config_tplg()
1737 sys_write32(sstsa, dai_base(dp) + SSTSA); in dai_ssp_set_config_tplg()
1738 sys_write32(ssrsa, dai_base(dp) + SSRSA); in dai_ssp_set_config_tplg()
1748 dp->state[DAI_DIR_PLAYBACK] = DAI_STATE_PRE_RUNNING; in dai_ssp_set_config_tplg()
1749 dp->state[DAI_DIR_CAPTURE] = DAI_STATE_PRE_RUNNING; in dai_ssp_set_config_tplg()
1755 ret = dai_ssp_mclk_prepare_enable(dp); in dai_ssp_set_config_tplg()
1763 dp->dai_index); in dai_ssp_set_config_tplg()
1773 ret = dai_ssp_bclk_prepare_enable(dp); in dai_ssp_set_config_tplg()
1783 dai_ssp_update_bits(dp, SSMIDyCS(dp->tdm_slot_group), in dai_ssp_set_config_tplg()
1785 dai_ssp_update_bits(dp, SSMODyCS(dp->tdm_slot_group), in dai_ssp_set_config_tplg()
1789 dai_ssp_update_bits(dp, SSCR0, SSCR0_SSE, SSCR0_SSE); in dai_ssp_set_config_tplg()
1800 if (dp->state[DAI_DIR_CAPTURE] != DAI_STATE_PRE_RUNNING || in dai_ssp_set_config_tplg()
1801 dp->state[DAI_DIR_PLAYBACK] != DAI_STATE_PRE_RUNNING) { in dai_ssp_set_config_tplg()
1803 dp->dai_index); in dai_ssp_set_config_tplg()
1809 dp->dai_index); in dai_ssp_set_config_tplg()
1814 dai_ssp_update_bits(dp, SSMODyCS(idx), SSMODyCS_TSRE, 0); in dai_ssp_set_config_tplg()
1818 dai_ssp_update_bits(dp, SSMIDyCS(idx), SSMIDyCS_RSRE, 0); in dai_ssp_set_config_tplg()
1821 dai_ssp_update_bits(dp, SSCR0, SSCR0_SSE, 0); in dai_ssp_set_config_tplg()
1822 LOG_INF("SSE clear for SSP%d", dp->dai_index); in dai_ssp_set_config_tplg()
1824 dai_ssp_bclk_disable_unprepare(dp); in dai_ssp_set_config_tplg()
1829 dp->dai_index); in dai_ssp_set_config_tplg()
1830 dai_ssp_mclk_disable_unprepare(dp); in dai_ssp_set_config_tplg()
1839 k_spin_unlock(&dp->lock, key); in dai_ssp_set_config_tplg()
1926 static int dai_ssp_parse_tlv(struct dai_intel_ssp *dp, const uint8_t *aux_ptr, size_t aux_len) in dai_ssp_parse_tlv() argument
1940 struct dai_intel_ssp_plat_data *ssp = dai_get_plat_data(dp); in dai_ssp_parse_tlv()
1990 sys_write32((sys_read32(dai_ip_base(dp) + I2SLCTL_OFFSET) & in dai_ssp_parse_tlv()
1992 I2CLCTL_MLCS(link->clock_source), dai_ip_base(dp) + in dai_ssp_parse_tlv()
1996 sys_write32((sys_read32(dai_i2svss_base(dp) + I2SLCTL_OFFSET) & in dai_ssp_parse_tlv()
1999 dai_i2svss_base(dp) + I2SLCTL_OFFSET); in dai_ssp_parse_tlv()
2016 static int dai_ssp_parse_aux_data(struct dai_intel_ssp *dp, const void *spec_config) in dai_ssp_parse_aux_data() argument
2044 return dai_ssp_parse_tlv(dp, aux_ptr, aux_len); in dai_ssp_parse_aux_data()
2047 static int dai_ssp_set_clock_control_ver_1_5(struct dai_intel_ssp *dp, in dai_ssp_set_clock_control_ver_1_5() argument
2059 dai_ssp_mn_set_mclk_blob(dp, cc->mdivctlr, cc->mdivr[0]); in dai_ssp_set_clock_control_ver_1_5()
2064 static int dai_ssp_set_clock_control_ver_1(struct dai_intel_ssp *dp, in dai_ssp_set_clock_control_ver_1() argument
2070 dai_ssp_mn_set_mclk_blob(dp, cc->mdivc, cc->mdivr); in dai_ssp_set_clock_control_ver_1()
2076 static void dai_ssp_set_reg_config(struct dai_intel_ssp *dp, const struct dai_config *cfg, in dai_ssp_set_reg_config() argument
2079 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_set_reg_config()
2085 LOG_INF("SSP%d configuration:", dp->dai_index); in dai_ssp_set_reg_config()
2087 sys_write32(ssc0, dai_base(dp) + SSCR0); in dai_ssp_set_reg_config()
2088 sys_write32(regs->ssc2 & ~SSCR2_SFRMEN, dai_base(dp) + SSCR2); /* hardware specific flow */ in dai_ssp_set_reg_config()
2089 sys_write32(sscr1, dai_base(dp) + SSCR1); in dai_ssp_set_reg_config()
2090 sys_write32(regs->ssc2 | SSCR2_SFRMEN, dai_base(dp) + SSCR2); /* hardware specific flow */ in dai_ssp_set_reg_config()
2091 sys_write32(regs->ssc2, dai_base(dp) + SSCR2); in dai_ssp_set_reg_config()
2092 sys_write32(regs->sspsp, dai_base(dp) + SSPSP); in dai_ssp_set_reg_config()
2093 sys_write32(regs->sspsp2, dai_base(dp) + SSPSP2); in dai_ssp_set_reg_config()
2094 sys_write32(regs->ssioc, dai_base(dp) + SSIOC); in dai_ssp_set_reg_config()
2095 sys_write32(regs->sscto, dai_base(dp) + SSTO); in dai_ssp_set_reg_config()
2098 sys_write64(regs->ssmidytsa[idx], dai_base(dp) + SSMIDyTSA(idx)); in dai_ssp_set_reg_config()
2102 sys_write64(regs->ssmodytsa[idx], dai_base(dp) + SSMODyTSA(idx)); in dai_ssp_set_reg_config()
2116 ssp_plat_data->params.tx_slots = regs->ssmodytsa[dp->tdm_slot_group]; in dai_ssp_set_reg_config()
2117 ssp_plat_data->params.rx_slots = regs->ssmidytsa[dp->tdm_slot_group]; in dai_ssp_set_reg_config()
2120 dp->state[DAI_DIR_PLAYBACK] = DAI_STATE_PRE_RUNNING; in dai_ssp_set_reg_config()
2121 dp->state[DAI_DIR_CAPTURE] = DAI_STATE_PRE_RUNNING; in dai_ssp_set_reg_config()
2124 static void dai_ssp_set_reg_config(struct dai_intel_ssp *dp, const struct dai_config *cfg, in dai_ssp_set_reg_config() argument
2127 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_set_reg_config()
2138 LOG_INF("SSP%d configuration:", dp->dai_index); in dai_ssp_set_reg_config()
2149 sys_write32(ssc0, dai_base(dp) + SSCR0); in dai_ssp_set_reg_config()
2150 sys_write32(regs->ssc2 & ~SSCR2_SFRMEN, dai_base(dp) + SSCR2); /* hardware specific flow */ in dai_ssp_set_reg_config()
2151 sys_write32(sscr1, dai_base(dp) + SSCR1); in dai_ssp_set_reg_config()
2152 sys_write32(regs->ssc2 | SSCR2_SFRMEN, dai_base(dp) + SSCR2); /* hardware specific flow */ in dai_ssp_set_reg_config()
2153 sys_write32(regs->ssc2, dai_base(dp) + SSCR2); in dai_ssp_set_reg_config()
2154 sys_write32(regs->ssc3, dai_base(dp) + SSCR3); in dai_ssp_set_reg_config()
2155 sys_write32(regs->sspsp, dai_base(dp) + SSPSP); in dai_ssp_set_reg_config()
2156 sys_write32(regs->sspsp2, dai_base(dp) + SSPSP2); in dai_ssp_set_reg_config()
2157 sys_write32(regs->ssioc, dai_base(dp) + SSIOC); in dai_ssp_set_reg_config()
2158 sys_write32(regs->sscto, dai_base(dp) + SSTO); in dai_ssp_set_reg_config()
2159 sys_write32(sstsa, dai_base(dp) + SSTSA); in dai_ssp_set_reg_config()
2160 sys_write32(ssrsa, dai_base(dp) + SSRSA); in dai_ssp_set_reg_config()
2178 dp->state[DAI_DIR_PLAYBACK] = DAI_STATE_PRE_RUNNING; in dai_ssp_set_reg_config()
2179 dp->state[DAI_DIR_CAPTURE] = DAI_STATE_PRE_RUNNING; in dai_ssp_set_reg_config()
2183 static int dai_ssp_set_config_blob(struct dai_intel_ssp *dp, const struct dai_config *cfg, in dai_ssp_set_config_blob() argument
2189 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_set_config_blob()
2193 dp->tdm_slot_group = cfg->tdm_slot_group; in dai_ssp_set_config_blob()
2198 dp->state[DAI_DIR_PLAYBACK] = DAI_STATE_PRE_RUNNING; in dai_ssp_set_config_blob()
2199 dp->state[DAI_DIR_CAPTURE] = DAI_STATE_PRE_RUNNING; in dai_ssp_set_config_blob()
2204 err = dai_ssp_parse_aux_data(dp, spec_config); in dai_ssp_set_config_blob()
2208 dai_ssp_set_reg_config(dp, cfg, (void *)&blob15->i2s_ssp_config); in dai_ssp_set_config_blob()
2209 err = dai_ssp_set_clock_control_ver_1_5(dp, &blob15->i2s_mclk_control); in dai_ssp_set_config_blob()
2214 err = dai_ssp_parse_aux_data(dp, spec_config); in dai_ssp_set_config_blob()
2218 dai_ssp_set_reg_config(dp, cfg, (void *)&blob30->i2s_ssp_config); in dai_ssp_set_config_blob()
2219 err = dai_ssp_set_clock_control_ver_1_5(dp, &blob30->i2s_mclk_control); in dai_ssp_set_config_blob()
2224 dai_ssp_set_reg_config(dp, cfg, (void *)&blob->i2s_driver_config.i2s_config); in dai_ssp_set_config_blob()
2225 err = dai_ssp_set_clock_control_ver_1(dp, &blob->i2s_driver_config.mclk_config); in dai_ssp_set_config_blob()
2234 dai_ssp_update_bits(dp, SSCR0, SSCR0_SSE, SSCR0_SSE); in dai_ssp_set_config_blob()
2246 static int dai_ssp_pre_start(struct dai_intel_ssp *dp) in dai_ssp_pre_start() argument
2248 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_pre_start()
2257 ret = dai_ssp_mclk_prepare_enable(dp); in dai_ssp_pre_start()
2264 ret = dai_ssp_bclk_prepare_enable(dp); in dai_ssp_pre_start()
2275 static void dai_ssp_post_stop(struct dai_intel_ssp *dp) in dai_ssp_post_stop() argument
2277 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_post_stop()
2280 if (dp->state[DAI_DIR_PLAYBACK] != DAI_STATE_RUNNING && in dai_ssp_post_stop()
2281 dp->state[DAI_DIR_CAPTURE] != DAI_STATE_RUNNING) { in dai_ssp_post_stop()
2283 LOG_INF("releasing BCLK clocks for SSP%d...", dp->dai_index); in dai_ssp_post_stop()
2284 dai_ssp_bclk_disable_unprepare(dp); in dai_ssp_post_stop()
2287 LOG_INF("releasing MCLK clocks for SSP%d...", dp->dai_index); in dai_ssp_post_stop()
2288 dai_ssp_mclk_disable_unprepare(dp); in dai_ssp_post_stop()
2293 static void dai_ssp_early_start(struct dai_intel_ssp *dp, int direction) in dai_ssp_early_start() argument
2295 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_early_start()
2298 key = k_spin_lock(&dp->lock); in dai_ssp_early_start()
2302 LOG_INF("SSP%d RX", dp->dai_index); in dai_ssp_early_start()
2303 ssp_empty_rx_fifo_on_start(dp); in dai_ssp_early_start()
2305 LOG_INF("SSP%d TX", dp->dai_index); in dai_ssp_early_start()
2309 dai_ssp_pre_start(dp); in dai_ssp_early_start()
2313 LOG_INF("SSP%d: set SSE", dp->dai_index); in dai_ssp_early_start()
2314 dai_ssp_update_bits(dp, SSCR0, SSCR0_SSE, SSCR0_SSE); in dai_ssp_early_start()
2317 k_spin_unlock(&dp->lock, key); in dai_ssp_early_start()
2321 static void dai_ssp_start(struct dai_intel_ssp *dp, int direction) in dai_ssp_start() argument
2323 struct dai_intel_ssp_pdata *ssp = dai_get_drvdata(dp); in dai_ssp_start()
2326 key = k_spin_lock(&dp->lock); in dai_ssp_start()
2332 dai_ssp_update_bits(dp, SSMODyCS(dp->tdm_slot_group), in dai_ssp_start()
2334 dai_ssp_update_bits(dp, SSMODyCS(dp->tdm_slot_group), in dai_ssp_start()
2337 dai_ssp_update_bits(dp, SSMIDyCS(dp->tdm_slot_group), in dai_ssp_start()
2339 dai_ssp_update_bits(dp, SSMIDyCS(dp->tdm_slot_group), in dai_ssp_start()
2344 LOG_INF("SSP%d TX", dp->dai_index); in dai_ssp_start()
2345 dai_ssp_update_bits(dp, SSCR1, SSCR1_TSRE, SSCR1_TSRE); in dai_ssp_start()
2346 dai_ssp_update_bits(dp, SSTSA, SSTSA_TXEN, SSTSA_TXEN); in dai_ssp_start()
2348 LOG_INF("SSP%d RX", dp->dai_index); in dai_ssp_start()
2349 dai_ssp_update_bits(dp, SSCR1, SSCR1_RSRE, SSCR1_RSRE); in dai_ssp_start()
2350 dai_ssp_update_bits(dp, SSRSA, SSRSA_RXEN, SSRSA_RXEN); in dai_ssp_start()
2354 dp->state[direction] = DAI_STATE_RUNNING; in dai_ssp_start()
2371 k_spin_unlock(&dp->lock, key); in dai_ssp_start()
2375 static void dai_ssp_stop(struct dai_intel_ssp *dp, int direction) in dai_ssp_stop() argument
2377 struct dai_intel_ssp_pdata *ssp = dai_get_drvdata(dp); in dai_ssp_stop()
2380 key = k_spin_lock(&dp->lock); in dai_ssp_stop()
2398 dp->state[DAI_DIR_CAPTURE] != DAI_STATE_PRE_RUNNING) { in dai_ssp_stop()
2399 LOG_INF("SSP%d RX", dp->dai_index); in dai_ssp_stop()
2402 dai_ssp_update_bits(dp, SSMIDyCS(dp->tdm_slot_group), SSMIDyCS_RXEN, 0); in dai_ssp_stop()
2403 dai_ssp_update_bits(dp, SSMIDyCS(dp->tdm_slot_group), SSMIDyCS_RSRE, 0); in dai_ssp_stop()
2405 dai_ssp_update_bits(dp, SSRSA, SSRSA_RXEN, 0); in dai_ssp_stop()
2406 dai_ssp_update_bits(dp, SSCR1, SSCR1_RSRE, 0); in dai_ssp_stop()
2408 ssp_empty_rx_fifo_on_stop(dp); in dai_ssp_stop()
2409 dp->state[DAI_DIR_CAPTURE] = DAI_STATE_PRE_RUNNING; in dai_ssp_stop()
2414 dp->state[DAI_DIR_PLAYBACK] != DAI_STATE_PRE_RUNNING) { in dai_ssp_stop()
2415 LOG_INF("SSP%d TX", dp->dai_index); in dai_ssp_stop()
2418 dai_ssp_update_bits(dp, SSMODyCS(dp->tdm_slot_group), SSMODyCS_TSRE, 0); in dai_ssp_stop()
2419 dai_ssp_empty_tx_fifo(dp); in dai_ssp_stop()
2420 dai_ssp_update_bits(dp, SSMODyCS(dp->tdm_slot_group), SSMODyCS_TXEN, 0); in dai_ssp_stop()
2422 dai_ssp_update_bits(dp, SSCR1, SSCR1_TSRE, 0); in dai_ssp_stop()
2423 dai_ssp_empty_tx_fifo(dp); in dai_ssp_stop()
2424 dai_ssp_update_bits(dp, SSTSA, SSTSA_TXEN, 0); in dai_ssp_stop()
2426 dp->state[DAI_DIR_PLAYBACK] = DAI_STATE_PRE_RUNNING; in dai_ssp_stop()
2429 k_spin_unlock(&dp->lock, key); in dai_ssp_stop()
2432 static void dai_ssp_pause(struct dai_intel_ssp *dp, int direction) in dai_ssp_pause() argument
2435 LOG_INF("SSP%d RX", dp->dai_index); in dai_ssp_pause()
2437 LOG_INF("SSP%d TX", dp->dai_index); in dai_ssp_pause()
2440 dp->state[direction] = DAI_STATE_PAUSED; in dai_ssp_pause()
2446 struct dai_intel_ssp *dp = (struct dai_intel_ssp *)dev->data; in dai_ssp_trigger() local
2449 LOG_DBG("SSP%d: cmd %d", dp->dai_index, cmd); in dai_ssp_trigger()
2453 if (dp->state[array_index] == DAI_STATE_PAUSED || in dai_ssp_trigger()
2454 dp->state[array_index] == DAI_STATE_PRE_RUNNING) { in dai_ssp_trigger()
2455 dai_ssp_start(dp, array_index); in dai_ssp_trigger()
2459 dai_ssp_stop(dp, array_index); in dai_ssp_trigger()
2462 dai_ssp_pause(dp, array_index); in dai_ssp_trigger()
2465 dai_ssp_early_start(dp, array_index); in dai_ssp_trigger()
2477 struct dai_intel_ssp *dp = (struct dai_intel_ssp *)dev->data; in dai_ssp_config_get() local
2478 struct dai_intel_ssp_pdata *ssp = dai_get_drvdata(dp); in dai_ssp_config_get()
2479 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_config_get()
2508 struct dai_intel_ssp *dp = (struct dai_intel_ssp *)dev->data; in dai_ssp_config_set() local
2509 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_config_set()
2513 ret = dai_ssp_set_config_tplg(dp, cfg, bespoke_cfg); in dai_ssp_config_set()
2515 ret = dai_ssp_set_config_blob(dp, cfg, bespoke_cfg); in dai_ssp_config_set()
2517 dai_ssp_program_channel_map(dp, cfg, ssp_plat_data->ssp_index, bespoke_cfg); in dai_ssp_config_set()
2525 struct dai_intel_ssp *dp = (struct dai_intel_ssp *)dev->data; in dai_ssp_get_properties() local
2526 struct dai_intel_ssp_pdata *ssp = dai_get_drvdata(dp); in dai_ssp_get_properties()
2527 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_get_properties()
2540 LOG_INF("SSP%u: fifo %u, handshake %u, init delay %u", dp->dai_index, prop->fifo_address, in dai_ssp_get_properties()
2546 static void ssp_acquire_ip(struct dai_intel_ssp *dp) in ssp_acquire_ip() argument
2548 struct dai_intel_ssp_plat_data *ssp = dai_get_plat_data(dp); in ssp_acquire_ip()
2554 dai_ssp_pm_runtime_en_ssp_power(dp, ssp->ssp_index); in ssp_acquire_ip()
2557 dai_ssp_pm_runtime_dis_ssp_clk_gating(dp, ssp->ssp_index); in ssp_acquire_ip()
2561 sys_write32((sys_read32(dai_i2svss_base(dp) + I2SLCTL_OFFSET) & in ssp_acquire_ip()
2564 dai_i2svss_base(dp) + I2SLCTL_OFFSET); in ssp_acquire_ip()
2569 static void ssp_release_ip(struct dai_intel_ssp *dp) in ssp_release_ip() argument
2571 struct dai_intel_ssp_plat_data *ssp = dai_get_plat_data(dp); in ssp_release_ip()
2581 if (dp->state[DAI_DIR_CAPTURE] == DAI_STATE_PRE_RUNNING && in ssp_release_ip()
2582 dp->state[DAI_DIR_PLAYBACK] == DAI_STATE_PRE_RUNNING && in ssp_release_ip()
2585 dai_ssp_update_bits(dp, SSCR0, SSCR0_SSE, 0); in ssp_release_ip()
2589 dai_ssp_post_stop(dp); in ssp_release_ip()
2593 sys_write32((sys_read32(dai_i2svss_base(dp) + I2SLCTL_OFFSET) & in ssp_release_ip()
2596 dai_i2svss_base(dp) + I2SLCTL_OFFSET); in ssp_release_ip()
2599 dai_ssp_pm_runtime_en_ssp_clk_gating(dp, ssp->ssp_index); in ssp_release_ip()
2601 dai_ssp_mclk_disable_unprepare(dp); in ssp_release_ip()
2602 dai_ssp_bclk_disable_unprepare(dp); in ssp_release_ip()
2605 dai_ssp_pm_runtime_dis_ssp_power(dp, ssp->ssp_index); in ssp_release_ip()
2610 static int dai_ssp_probe(struct dai_intel_ssp *dp) in dai_ssp_probe() argument
2612 struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp); in dai_ssp_probe()
2615 if (dai_get_drvdata(dp)) { in dai_ssp_probe()
2625 dai_set_drvdata(dp, ssp); in dai_ssp_probe()
2627 dp->state[DAI_DIR_PLAYBACK] = DAI_STATE_READY; in dai_ssp_probe()
2628 dp->state[DAI_DIR_CAPTURE] = DAI_STATE_READY; in dai_ssp_probe()
2632 dai_ssp_mn_reset_bclk_divider(dp, ssp_plat_data->ssp_index); in dai_ssp_probe()
2635 ssp_acquire_ip(dp); in dai_ssp_probe()
2640 static int dai_ssp_remove(struct dai_intel_ssp *dp) in dai_ssp_remove() argument
2642 ssp_release_ip(dp); in dai_ssp_remove()
2644 k_free(dai_get_drvdata(dp)); in dai_ssp_remove()
2645 dai_set_drvdata(dp, NULL); in dai_ssp_remove()
2652 struct dai_intel_ssp *dp = (struct dai_intel_ssp *)dev->data; in ssp_pm_action() local
2656 dai_ssp_remove(dp); in ssp_pm_action()
2659 dai_ssp_probe(dp); in ssp_pm_action()
2674 struct dai_intel_ssp *dp = (struct dai_intel_ssp *)dev->data; in dai_intel_ssp_init_device() local
2676 dp->ssp_plat_data = ssp_get_device_instance(dp->ssp_index); in dai_intel_ssp_init_device()
2691 struct dai_intel_ssp *dp = (struct dai_intel_ssp *)dev->data; in dai_ssp_dma_control_set() local
2694 dp->dai_index, (uint32_t)bespoke_cfg, size); in dai_ssp_dma_control_set()
2699 if (dp->state[DAI_DIR_PLAYBACK] != DAI_STATE_READY || in dai_ssp_dma_control_set()
2700 dp->state[DAI_DIR_CAPTURE] != DAI_STATE_READY) { in dai_ssp_dma_control_set()
2708 return dai_ssp_parse_tlv(dp, bespoke_cfg, size); in dai_ssp_dma_control_set()