Lines Matching full:08
142 LOG_INF("pdm = %d, FIR_CONFIG = 0x%08X", pdm, val); in dai_nhlt_get_clock_div()
445 LOG_INF("OUTCONTROL = %08x", val); in print_outcontrol()
476 LOG_WRN("Some reserved bits are set in OUTCONTROL = 0x%08x", val); in print_outcontrol()
498 LOG_DBG("CIC_CONTROL = %08x", val); in print_cic_control()
515 LOG_WRN("Some reserved bits are set in CIC_CONTROL = 0x%08x", val); in print_cic_control()
534 LOG_DBG("FIR_CONTROL = %08x", val); in print_fir_control()
548 LOG_WRN("Some reserved bits are set in FIR_CONTROL = 0x%08x", val); in print_fir_control()
557 LOG_DBG("CIC_CONTROL = %08x", pdm_cfg->cic_control); in print_pdm_ctrl()
562 LOG_DBG("CIC_CONFIG = %08x", val); in print_pdm_ctrl()
576 LOG_DBG("MIC_CONTROL = %08x", val); in print_pdm_ctrl()
590 LOG_DBG("FIR_CONFIG = %08x", val); in print_fir_config()
597 LOG_DBG("DC_OFFSET_LEFT = %08x", fir_cfg->dc_offset_left); in print_fir_config()
598 LOG_DBG("DC_OFFSET_RIGHT = %08x", fir_cfg->dc_offset_right); in print_fir_config()
599 LOG_DBG("OUT_GAIN_LEFT = %08x", fir_cfg->out_gain_left); in print_fir_config()
600 LOG_DBG("OUT_GAIN_RIGHT = %08x", fir_cfg->out_gain_right); in print_fir_config()
620 LOG_DBG("FIR_CONTROL = %08x", val); in configure_fir()
706 LOG_INF("OUTCONTROL%d = %08x", dmic->dai_config_params.dai_index, in dai_dmic_set_config_nhlt()
752 LOG_DBG("dmic_set_config_nhlt(): CIC_CONTROL = %08x", val); in dai_dmic_set_config_nhlt()
762 LOG_DBG("dmic_set_config_nhlt(): MIC_CONTROL = %08x", val); in dai_dmic_set_config_nhlt()