34 #define sys_read64(addr)    (((uint64_t)(sys_read32(addr + 4)) << 32) | \
35 			     sys_read32(addr))
124 	sys_write32((sys_read32(dest) & (~mask)) | (val & mask), dest);  in dai_dmic_update_bits()
136 	return sys_read32(dmic->reg_base + reg);  in dai_dmic_read()
143 	sys_write32(sys_read32(dmic->shim_base + DMICLCTL_OFFSET) |  in dai_dmic_claim_ownership()
150 	sys_write32(sys_read32(dmic->shim_base + DMICLCTL_OFFSET) &  in dai_dmic_release_ownership()
177 	sys_write32(sys_read32(base + DMICSYNC_OFFSET) | FIELD_PREP(DMICSYNC_SYNCPRD, val),  in dai_dmic_set_sync_period()
179 	sys_write32(sys_read32(base + DMICSYNC_OFFSET) | DMICSYNC_SYNCPU,  in dai_dmic_set_sync_period()
182 	if (!WAIT_FOR((sys_read32(base + DMICSYNC_OFFSET) & DMICSYNC_SYNCPU) == 0, 1000,  in dai_dmic_set_sync_period()
187 	sys_write32(sys_read32(base + DMICSYNC_OFFSET) | DMICSYNC_CMDSYNC,  in dai_dmic_set_sync_period()
190 	sys_write32(sys_read32(base + DMICSYNC_OFFSET) | FIELD_PREP(DMICSYNC_SYNCPRD, val),  in dai_dmic_set_sync_period()
192 	sys_write32(sys_read32(base + DMICSYNC_OFFSET) | DMICSYNC_CMDSYNC,  in dai_dmic_set_sync_period()
201 	sys_write32(sys_read32(base + DMICSYNC_OFFSET) & ~DMICSYNC_SYNCPRD,  in dai_dmic_clear_sync_period()
203 	sys_write32(sys_read32(base + DMICSYNC_OFFSET) & ~DMICSYNC_CMDSYNC,  in dai_dmic_clear_sync_period()
212 	sys_write32(sys_read32(base + DMICSYNC_OFFSET) | DMICSYNC_CMDSYNC,  in dai_dmic_sync_prepare()
221 	__ASSERT_NO_MSG((sys_read32(base + DMICSYNC_OFFSET) & DMICSYNC_CMDSYNC) != 0);  in dmic_sync_trigger()
223 	sys_write32(sys_read32(base + DMICSYNC_OFFSET) |  in dmic_sync_trigger()
227 	if (!WAIT_FOR((sys_read32(base + DMICSYNC_OFFSET) & DMICSYNC_CMDSYNC) == 0,  in dmic_sync_trigger()
291 	sys_write32((sys_read32(dmic->vshim_base + DMICLVSCTL_OFFSET) | DMICLVSCTL_DCGD),  in dai_dmic_dis_clk_gating()
294 	sys_write32((sys_read32(dmic->shim_base + DMICLCTL_OFFSET) | DMICLCTL_DCGD),  in dai_dmic_dis_clk_gating()
303 	sys_write32((sys_read32(dmic->vshim_base + DMICLVSCTL_OFFSET) & ~DMICLVSCTL_DCGD),  in dai_dmic_en_clk_gating()
306 	sys_write32((sys_read32(dmic->shim_base + DMICLCTL_OFFSET) & ~DMICLCTL_DCGD),  in dai_dmic_en_clk_gating()
332 	sys_write32((sys_read32(base + DMICLCTL_OFFSET) | DMICLCTL_SPA),  in dai_dmic_en_power()
336 	while (!(sys_read32(base + DMICLCTL_OFFSET) & DMICLCTL_CPA)) {  in dai_dmic_en_power()
346 	sys_write32((sys_read32(base + DMICLCTL_OFFSET) & (~DMICLCTL_SPA)),  in dai_dmic_dis_power()
449 	ntk = sys_read32(tsctrl) & TS_LOCAL_TSCTRL_NTK;  in dai_timestamp_dmic_get()