35 	if (status == 0 && sha->dfsha->shactl.part.en == 1) {  in intel_sha_set_ctl_enable()
36 		while (sha->dfsha->shasts.part.busy) {  in intel_sha_set_ctl_enable()
40 	sha->dfsha->shactl.part.en = status;  in intel_sha_set_ctl_enable()
96 	self->dfsha->pibcs.part.peen = 0;  in intel_sha_device_run()
106 	self->dfsha->pibcs.part.bscie = 1;  in intel_sha_device_run()
107 	self->dfsha->pibcs.part.teie = 0;  in intel_sha_device_run()
109 	self->dfsha->pibcs.part.peen = 1;  in intel_sha_device_run()
111 	if (self->dfsha->shactl.part.en) {  in intel_sha_device_run()
115 	self->dfsha->shactl.part.hrsm = state_u.part.hrsm;  in intel_sha_device_run()
118 	if (state_u.part.hrsm) {  in intel_sha_device_run()
136 	if (self->dfsha->shactl.part.en) {  in intel_sha_device_run()
140 	self->dfsha->shactl.part.hfm = state_u.part.state;  in intel_sha_device_run()
189 	while (self->dfsha->shasts.part.busy) {  in intel_sha_device_get_hash()
208 	self->dfsha->shactl.part.algo = session->algo;  in intel_sha_compute()
236 			session->state.part.state = SHA_LAST;  in intel_sha_compute()
246 		session->state.part.hrsm = SHA_HRSM_ENABLE;  in intel_sha_compute()
247 		session->state.part.state = SHA_MIDLE;  in intel_sha_compute()
254 		switch (self->dfsha->shactl.part.algo) {  in intel_sha_compute()
299 	self->dfsha->pibcs.part.peen = 0;  in intel_sha_device_set_hash_type()
302 	sha_sessions[ctx_idx].state.part.state = SHA_FIRST;  in intel_sha_device_set_hash_type()
303 	sha_sessions[ctx_idx].state.part.hrsm = SHA_HRSM_DISABLE;  in intel_sha_device_set_hash_type()