78 	uint32_t tcsr = TCSR0_DEFAULT | TCSR_ENT;  in xlnx_axi_timer_start()  local
84 		tcsr |= TCSR_ENALL;  in xlnx_axi_timer_start()
87 	xlnx_axi_timer_write32(dev, tcsr, TCSR0_OFFSET);  in xlnx_axi_timer_start()
125 	uint32_t tcsr;  in xlnx_axi_timer_set_alarm()  local
162 	tcsr = xlnx_axi_timer_read32(dev, TCSR0_OFFSET);  in xlnx_axi_timer_set_alarm()
163 	tcsr &= TCSR_ENT;  in xlnx_axi_timer_set_alarm()
164 	xlnx_axi_timer_write32(dev, TCSR1_DEFAULT | tcsr, TCSR1_OFFSET);  in xlnx_axi_timer_set_alarm()
192 	uint32_t tcsr;  in xlnx_axi_timer_set_top_value()  local
217 	tcsr = xlnx_axi_timer_read32(dev, TCSR0_OFFSET);  in xlnx_axi_timer_set_top_value()
218 	if ((tcsr & TCSR_ENT) == 0U) {  in xlnx_axi_timer_set_top_value()
226 		xlnx_axi_timer_write32(dev, tcsr | TCSR_LOAD, TCSR0_OFFSET);  in xlnx_axi_timer_set_top_value()
227 		xlnx_axi_timer_write32(dev, tcsr, TCSR0_OFFSET);  in xlnx_axi_timer_set_top_value()
237 	uint32_t tcsr;  in xlnx_axi_timer_get_pending_int()  local
239 	tcsr = xlnx_axi_timer_read32(dev, TCSR0_OFFSET);  in xlnx_axi_timer_get_pending_int()
240 	if (tcsr & TCSR_TINT) {  in xlnx_axi_timer_get_pending_int()
245 		tcsr = xlnx_axi_timer_read32(dev, TCSR1_OFFSET);  in xlnx_axi_timer_get_pending_int()
246 		if (tcsr & TCSR_TINT) {  in xlnx_axi_timer_get_pending_int()
265 	uint32_t tcsr;  in xlnx_axi_timer_isr()  local
268 	tcsr = xlnx_axi_timer_read32(dev, TCSR1_OFFSET);  in xlnx_axi_timer_isr()
269 	if (tcsr & TCSR_TINT) {  in xlnx_axi_timer_isr()
282 	tcsr = xlnx_axi_timer_read32(dev, TCSR0_OFFSET);  in xlnx_axi_timer_isr()
283 	if (tcsr & TCSR_TINT) {  in xlnx_axi_timer_isr()
284 		xlnx_axi_timer_write32(dev, tcsr, TCSR0_OFFSET);  in xlnx_axi_timer_isr()