108 					      uint8_t channel)  in stm_disable_channel()  argument
110 	REG_WRITE(STM_CCR(channel), STM_CCR_CEN(0U));  in stm_disable_channel()
111 	REG_WRITE(STM_CIR(channel), STM_CIR_CIF(1U));  in stm_disable_channel()
114 static int stm_set_alarm(const struct device *dev, uint8_t channel, uint32_t ticks, uint32_t flags)  in stm_set_alarm()  argument
118 	struct nxp_s32_sys_timer_chan_data *ch_data = &data->ch_data[channel];  in stm_set_alarm()
147 	stm_disable_channel(config, channel);  in stm_set_alarm()
148 	REG_WRITE(STM_CMP(channel), ticks);  in stm_set_alarm()
149 	REG_WRITE(STM_CCR(channel), STM_CCR_CEN(1U));  in stm_set_alarm()
166 			atomic_or(&data->irq_pending, BIT(channel));  in stm_set_alarm()
183 	uint8_t channel;  in stm_isr()  local
186 	for (channel = 0; channel < SYS_TIMER_NUM_CHANNELS; ++channel) {  in stm_isr()
187 		pending = FIELD_GET(STM_CCR_CEN_MASK, REG_READ(STM_CCR(channel))) &&  in stm_isr()
188 			  FIELD_GET(STM_CIR_CIF_MASK, REG_READ(STM_CIR(channel)));  in stm_isr()
190 		if (pending || atomic_test_bit(&data->irq_pending, channel)) {  in stm_isr()
191 			stm_disable_channel(config, channel);  in stm_isr()
192 			atomic_and(&data->irq_pending, ~BIT(channel));  in stm_isr()
194 			ch_data = &data->ch_data[channel];  in stm_isr()
200 				cb(dev, channel, REG_READ(STM_CNT), cb_args);  in stm_isr()
234 static int nxp_s32_sys_timer_set_alarm(const struct device *dev, uint8_t channel,  in nxp_s32_sys_timer_set_alarm()  argument
239 	struct nxp_s32_sys_timer_chan_data *ch_data = &data->ch_data[channel];  in nxp_s32_sys_timer_set_alarm()
253 	return stm_set_alarm(dev, channel, alarm_cfg->ticks, alarm_cfg->flags);  in nxp_s32_sys_timer_set_alarm()
256 static int nxp_s32_sys_timer_cancel_alarm(const struct device *dev, uint8_t channel)  in nxp_s32_sys_timer_cancel_alarm()  argument
260 	struct nxp_s32_sys_timer_chan_data *ch_data = &data->ch_data[channel];  in nxp_s32_sys_timer_cancel_alarm()
262 	stm_disable_channel(config, channel);  in nxp_s32_sys_timer_cancel_alarm()