48 #define REG_WRITE(r, v)  sys_write32((v), config->base + (r))  macro
110 	REG_WRITE(STM_CCR(channel), STM_CCR_CEN(0U));  in stm_disable_channel()
111 	REG_WRITE(STM_CIR(channel), STM_CIR_CIF(1U));  in stm_disable_channel()
148 	REG_WRITE(STM_CMP(channel), ticks);  in stm_set_alarm()
149 	REG_WRITE(STM_CCR(channel), STM_CCR_CEN(1U));  in stm_set_alarm()
210 	REG_WRITE(STM_CNT, 0U);  in nxp_s32_sys_timer_start()
211 	REG_WRITE(STM_CR, REG_READ(STM_CR) | STM_CR_TEN(1U));  in nxp_s32_sys_timer_start()
220 	REG_WRITE(STM_CR, REG_READ(STM_CR) & ~STM_CR_TEN_MASK);  in nxp_s32_sys_timer_stop()
354 	REG_WRITE(STM_CNT, 0U);  in nxp_s32_sys_timer_init()
355 	REG_WRITE(STM_CR,  in nxp_s32_sys_timer_init()
365 		REG_WRITE(STM_CCR(i), STM_CCR_CEN(0U));  in nxp_s32_sys_timer_init()
366 		REG_WRITE(STM_CIR(i), STM_CIR_CIF(1U));  in nxp_s32_sys_timer_init()
367 		REG_WRITE(STM_CMP(i), 0U);  in nxp_s32_sys_timer_init()