Lines Matching full:cc
58 /* Store channel interrupt pending and CC adjusted flags. */
133 /* From Product Specification: If a CC register value is 0 when in skip_zero_on_custom_top()
170 /** @brief Handle case when CC value equals COUNTER+1.
172 * RTC will not generate event if CC value equals COUNTER+1. If such CC is
174 * expire before expected value, CC is set to COUNTER+2. If COUNTER progressed
177 * that CC value will generate event.
179 * Additionally, an information about CC adjustment is stored. This information
180 * is used in the callback to return original CC value which was requested by
202 * Setting CC algorithm takes into account:
247 "Expected that CC interrupt is disabled."); in set_cc()
253 /* First take care of a risk of an event coming from CC being set to in set_cc()
254 * next tick. Reconfigure CC to future (now tick is the furthest in set_cc()
255 * future). If CC was set to next tick we need to wait for up to 15us in set_cc()
281 * by limiting relative distance between CC and counter. in set_cc()
293 /* CC cannot be set to COUNTER+1 because that will not in set_cc()
295 * performed (attempt to set CC to COUNTER+2). in set_cc()
321 /* It is possible that setting CC was interrupted and in set_cc()
322 * CC might be set to COUNTER+1 value which will not in set_cc()
324 * is performed (attempt to set CC to COUNTER+2). in set_cc()
655 uint32_t cc = nrfy_rtc_cc_get(rtc, chan); in alarm_irq_handle() local
658 cc = ticks_sub(dev, cc, 1, data->top); in alarm_irq_handle()
661 cb(dev, chan, cc, chdata->user_data); in alarm_irq_handle()