4  * SPDX-License-Identifier: Apache-2.0
44 	const struct max32_tmr_config *cfg = dev->config;  in api_start()
46 	Wrap_MXC_TMR_EnableInt(cfg->regs);  in api_start()
47 	MXC_TMR_Start(cfg->regs);  in api_start()
54 	const struct max32_tmr_config *cfg = dev->config;  in api_stop()
56 	Wrap_MXC_TMR_DisableInt(cfg->regs);  in api_stop()
57 	MXC_TMR_Stop(cfg->regs);  in api_stop()
64 	const struct max32_tmr_config *cfg = dev->config;  in api_get_value()
66 	*ticks = MXC_TMR_GetCount(cfg->regs);  in api_get_value()
72 	const struct max32_tmr_config *cfg = dev->config;  in api_set_top_value()
74 	if (counter_cfg->ticks == 0) {  in api_set_top_value()
75 		return -EINVAL;  in api_set_top_value()
78 	if (counter_cfg->ticks != cfg->info.max_top_value) {  in api_set_top_value()
79 		return -ENOTSUP;  in api_set_top_value()
87 	const struct max32_tmr_config *cfg = dev->config;  in api_get_pending_int()
89 	return Wrap_MXC_TMR_GetPendingInt(cfg->regs);  in api_get_pending_int()
94 	const struct max32_tmr_config *cfg = dev->config;  in api_get_top_value()
96 	return cfg->info.max_top_value;  in api_get_top_value()
101 	const struct max32_tmr_config *cfg = dev->config;  in api_get_freq()
103 	return cfg->info.freq;  in api_get_freq()
108 	const struct max32_tmr_config *config = dev->config;  in set_cc()
109 	struct max32_tmr_data *data = dev->data;  in set_cc()
110 	mxc_tmr_regs_t *regs = config->regs;  in set_cc()
124 		max_rel_val = top - data->guard_period;  in set_cc()
133 	diff = (val - now);  in set_cc()
136 			err = -ETIME;  in set_cc()
139 		/* Interrupt is triggered always for relative alarm and  in set_cc()
145 			config->ch_data[id].callback = NULL;  in set_cc()
157 	const struct max32_tmr_config *cfg = dev->config;  in api_set_alarm()
158 	struct max32_tmr_ch_data *chdata = &cfg->ch_data[chan];  in api_set_alarm()
160 	if (alarm_cfg->ticks > api_get_top_value(dev)) {  in api_set_alarm()
161 		return -EINVAL;  in api_set_alarm()
164 	if (chdata->callback) {  in api_set_alarm()
165 		return -EBUSY;  in api_set_alarm()
168 	chdata->callback = alarm_cfg->callback;  in api_set_alarm()
169 	chdata->user_data = alarm_cfg->user_data;  in api_set_alarm()
171 	return set_cc(dev, chan, alarm_cfg->ticks, alarm_cfg->flags);  in api_set_alarm()
176 	const struct max32_tmr_config *cfg = dev->config;  in api_cancel_alarm()
178 	MXC_TMR_Stop(cfg->regs);  in api_cancel_alarm()
179 	MXC_TMR_SetCount(cfg->regs, 0);  in api_cancel_alarm()
180 	MXC_TMR_SetCompare(cfg->regs, cfg->info.max_top_value);  in api_cancel_alarm()
181 	Wrap_MXC_TMR_DisableInt(cfg->regs);  in api_cancel_alarm()
182 	cfg->ch_data[chan].callback = NULL;  in api_cancel_alarm()
189 	struct max32_tmr_data *data = dev->data;  in api_get_guard_period()
193 	return data->guard_period;  in api_get_guard_period()
198 	struct max32_tmr_data *data = dev->data;  in api_set_guard_period()
203 		return -EINVAL;  in api_set_guard_period()
206 	data->guard_period = ticks;  in api_set_guard_period()
212 	const struct max32_tmr_config *cfg = dev->config;  in max32_alarm_irq_handle()
216 	chdata = &cfg->ch_data[id];  in max32_alarm_irq_handle()
217 	cb = chdata->callback;  in max32_alarm_irq_handle()
218 	chdata->callback = NULL;  in max32_alarm_irq_handle()
221 		cb(dev, id, MXC_TMR_GetCount(cfg->regs), chdata->user_data);  in max32_alarm_irq_handle()
227 	const struct max32_tmr_config *cfg = dev->config;  in counter_max32_isr()
228 	struct max32_tmr_data *data = dev->data;  in counter_max32_isr()
230 	MXC_TMR_ClearFlags(cfg->regs);  in counter_max32_isr()
231 	Wrap_MXC_TMR_ClearWakeupFlags(cfg->regs);  in counter_max32_isr()
235 	if (data->top_callback) {  in counter_max32_isr()
236 		data->top_callback(dev, data->top_user_data);  in counter_max32_isr()
243 	const struct max32_tmr_config *cfg = dev->config;  in max32_counter_init()
244 	mxc_tmr_regs_t *regs = cfg->regs;  in max32_counter_init()
248 	prescaler_index = LOG2(cfg->prescaler);  in max32_counter_init()
253 		tmr_cfg.pres = TMR_PRES_2 + (prescaler_index - 1);  in max32_counter_init()
256 	tmr_cfg.cmp_cnt = cfg->info.max_top_value;  in max32_counter_init()
257 	tmr_cfg.bitMode = 0; /* Timer Mode 32 bit */  in max32_counter_init()
260 	tmr_cfg.clock = Wrap_MXC_TMR_GetClockIndex(cfg->clock_source);  in max32_counter_init()
262 		return -ENOTSUP;  in max32_counter_init()
268 	ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk);  in max32_counter_init()
278 	/* Set preload and actually pre-load the counter */  in max32_counter_init()
279 	MXC_TMR_SetCompare(regs, cfg->info.max_top_value);  in max32_counter_init()
281 	cfg->irq_func(dev);  in max32_counter_init()
283 	if (cfg->wakeup_source) {  in max32_counter_init()
286 		/* Enable Timer wake-up source */  in max32_counter_init()
307 #define TIMER(_num)    DT_INST_PARENT(_num)  macro
308 #define MAX32_TIM(idx) ((mxc_tmr_regs_t *)DT_REG_ADDR(TIMER(idx)))
314 		IRQ_CONNECT(DT_IRQN(TIMER(_num)), DT_IRQ(TIMER(_num), priority),                   \
316 		irq_enable(DT_IRQN(TIMER(_num)));                                                  \
325 						DT_PROP(TIMER(_num), clock_source)) /              \
326 					DT_PROP(TIMER(_num), prescaler),                           \
330 		.regs = (mxc_tmr_regs_t *)DT_REG_ADDR(TIMER(_num)),                                \
331 		.clock = DEVICE_DT_GET(DT_CLOCKS_CTLR(TIMER(_num))),                               \
332 		.perclk.bus = DT_CLOCKS_CELL(TIMER(_num), offset),                                 \
333 		.perclk.bit = DT_CLOCKS_CELL(TIMER(_num), bit),                                    \
334 		.clock_source = DT_PROP(TIMER(_num), clock_source),                                \
335 		.prescaler = DT_PROP(TIMER(_num), prescaler),                                      \
338 		.wakeup_source = DT_PROP(TIMER(_num), wakeup_source),                              \