Lines Matching +full:max +full:- +full:bus +full:- +full:freq
4 * SPDX-License-Identifier: Apache-2.0
21 /* L0 series MCUs only have 16-bit timers and don't have below macro defined */
94 uint32_t freq; member
118 const struct counter_stm32_config *config = dev->config; in counter_stm32_start()
119 TIM_TypeDef *timer = config->timer; in counter_stm32_start()
129 const struct counter_stm32_config *config = dev->config; in counter_stm32_stop()
130 TIM_TypeDef *timer = config->timer; in counter_stm32_stop()
140 const struct counter_stm32_config *config = dev->config; in counter_stm32_get_top_value()
142 return LL_TIM_GetAutoReload(config->timer); in counter_stm32_get_top_value()
147 const struct counter_stm32_config *config = dev->config; in counter_stm32_read()
149 return LL_TIM_GetCounter(config->timer); in counter_stm32_read()
166 to_top = top - val1; in counter_stm32_ticks_add()
168 return (val2 <= to_top) ? val1 + val2 : val2 - to_top - 1U; in counter_stm32_ticks_add()
174 return (val - old) & top; in counter_stm32_ticks_sub()
177 /* if top is not 2^n-1 */ in counter_stm32_ticks_sub()
178 return (val >= old) ? (val - old) : val + top + 1U - old; in counter_stm32_ticks_sub()
183 const struct counter_stm32_config *config = dev->config; in counter_stm32_counter_stm32_set_cc_int_pending()
184 struct counter_stm32_data *data = dev->data; in counter_stm32_counter_stm32_set_cc_int_pending()
186 atomic_or(&data->cc_int_pending, BIT(chan)); in counter_stm32_counter_stm32_set_cc_int_pending()
187 NVIC_SetPendingIRQ(config->irqn); in counter_stm32_counter_stm32_set_cc_int_pending()
193 const struct counter_stm32_config *config = dev->config; in counter_stm32_set_cc()
194 struct counter_stm32_data *data = dev->data; in counter_stm32_set_cc()
196 __ASSERT_NO_MSG(data->guard_period < counter_stm32_get_top_value(dev)); in counter_stm32_set_cc()
197 uint32_t val = alarm_cfg->ticks; in counter_stm32_set_cc()
198 uint32_t flags = alarm_cfg->flags; in counter_stm32_set_cc()
201 TIM_TypeDef *timer = config->timer; in counter_stm32_set_cc()
222 max_rel_val = top - data->guard_period; in counter_stm32_set_cc()
235 /* limit max to detect short relative being set too late. */ in counter_stm32_set_cc()
245 diff = counter_stm32_ticks_sub(val - 1U, counter_stm32_read(dev), top); in counter_stm32_set_cc()
248 err = -ETIME; in counter_stm32_set_cc()
257 config->ch_data[id].callback = NULL; in counter_stm32_set_cc()
269 const struct counter_stm32_config *config = dev->config; in counter_stm32_set_alarm()
270 struct counter_stm32_ch_data *chdata = &config->ch_data[chan]; in counter_stm32_set_alarm()
272 if (alarm_cfg->ticks > counter_stm32_get_top_value(dev)) { in counter_stm32_set_alarm()
273 return -EINVAL; in counter_stm32_set_alarm()
276 if (chdata->callback) { in counter_stm32_set_alarm()
277 return -EBUSY; in counter_stm32_set_alarm()
280 chdata->callback = alarm_cfg->callback; in counter_stm32_set_alarm()
281 chdata->user_data = alarm_cfg->user_data; in counter_stm32_set_alarm()
288 const struct counter_stm32_config *config = dev->config; in counter_stm32_cancel_alarm()
290 disable_it[chan](config->timer); in counter_stm32_cancel_alarm()
291 config->ch_data[chan].callback = NULL; in counter_stm32_cancel_alarm()
299 const struct counter_stm32_config *config = dev->config; in counter_stm32_set_top_value()
300 TIM_TypeDef *timer = config->timer; in counter_stm32_set_top_value()
301 struct counter_stm32_data *data = dev->data; in counter_stm32_set_top_value()
308 if (config->ch_data[i].callback) { in counter_stm32_set_top_value()
309 return -EBUSY; in counter_stm32_set_top_value()
314 LL_TIM_SetAutoReload(timer, cfg->ticks); in counter_stm32_set_top_value()
317 data->top_cb = cfg->callback; in counter_stm32_set_top_value()
318 data->top_user_data = cfg->user_data; in counter_stm32_set_top_value()
320 if (!(cfg->flags & COUNTER_TOP_CFG_DONT_RESET)) { in counter_stm32_set_top_value()
322 } else if (counter_stm32_read(dev) >= cfg->ticks) { in counter_stm32_set_top_value()
323 err = -ETIME; in counter_stm32_set_top_value()
324 if (cfg->flags & COUNTER_TOP_CFG_RESET_WHEN_LATE) { in counter_stm32_set_top_value()
329 if (cfg->callback) { in counter_stm32_set_top_value()
338 const struct counter_stm32_config *cfg = dev->config; in counter_stm32_get_pending_int()
343 pending |= LL_TIM_IsActiveFlag_CC4(cfg->timer); in counter_stm32_get_pending_int()
346 pending |= LL_TIM_IsActiveFlag_CC3(cfg->timer); in counter_stm32_get_pending_int()
349 pending |= LL_TIM_IsActiveFlag_CC2(cfg->timer); in counter_stm32_get_pending_int()
352 pending |= LL_TIM_IsActiveFlag_CC1(cfg->timer); in counter_stm32_get_pending_int()
377 return -ENODEV; in counter_stm32_get_tim_clk()
387 if (pclken->bus == STM32_CLOCK_BUS_APB1) { in counter_stm32_get_tim_clk()
393 if (pclken->bus == STM32_CLOCK_BUS_APB1) { in counter_stm32_get_tim_clk()
395 apb_psc = (uint32_t)(READ_BIT(RCC->APB1DIVR, RCC_APB1DIVR_APB1DIV)); in counter_stm32_get_tim_clk()
403 apb_psc = (uint32_t)(READ_BIT(RCC->APB2DIVR, RCC_APB2DIVR_APB2DIV)); in counter_stm32_get_tim_clk()
465 const struct counter_stm32_config *cfg = dev->config; in counter_stm32_init_timer()
466 struct counter_stm32_data *data = dev->data; in counter_stm32_init_timer()
467 TIM_TypeDef *timer = cfg->timer; in counter_stm32_init_timer()
474 (clock_control_subsys_t)&cfg->pclken); in counter_stm32_init_timer()
479 r = counter_stm32_get_tim_clk(&cfg->pclken, &tim_clk); in counter_stm32_init_timer()
484 data->freq = tim_clk / (cfg->prescaler + 1U); in counter_stm32_init_timer()
486 if (!device_is_ready(cfg->reset.dev)) { in counter_stm32_init_timer()
488 return -ENODEV; in counter_stm32_init_timer()
492 (void)reset_line_toggle_dt(&cfg->reset); in counter_stm32_init_timer()
495 cfg->irq_config_func(dev); in counter_stm32_init_timer()
500 init.Prescaler = cfg->prescaler; in counter_stm32_init_timer()
507 return -EIO; in counter_stm32_init_timer()
515 struct counter_stm32_data *data = dev->data; in counter_stm32_get_guard_period()
518 return data->guard_period; in counter_stm32_get_guard_period()
524 struct counter_stm32_data *data = dev->data; in counter_stm32_set_guard_period()
529 data->guard_period = guard; in counter_stm32_set_guard_period()
535 struct counter_stm32_data *data = dev->data; in counter_stm32_get_freq()
537 return data->freq; in counter_stm32_get_freq()
542 struct counter_stm32_data *data = dev->data; in counter_stm32_top_irq_handle()
544 counter_top_callback_t cb = data->top_cb; in counter_stm32_top_irq_handle()
546 __ASSERT(cb != NULL, "top event enabled - expecting callback"); in counter_stm32_top_irq_handle()
547 cb(dev, data->top_user_data); in counter_stm32_top_irq_handle()
552 const struct counter_stm32_config *config = dev->config; in counter_stm32_alarm_irq_handle()
553 struct counter_stm32_data *data = dev->data; in counter_stm32_alarm_irq_handle()
554 TIM_TypeDef *timer = config->timer; in counter_stm32_alarm_irq_handle()
559 atomic_and(&data->cc_int_pending, ~BIT(id)); in counter_stm32_alarm_irq_handle()
562 chdata = &config->ch_data[id]; in counter_stm32_alarm_irq_handle()
563 cb = chdata->callback; in counter_stm32_alarm_irq_handle()
564 chdata->callback = NULL; in counter_stm32_alarm_irq_handle()
569 cb(dev, id, cc_val, chdata->user_data); in counter_stm32_alarm_irq_handle()
591 if (hw_irq || (data->cc_int_pending & BIT(cc - 1U))) { \
595 counter_stm32_alarm_irq_handle(dev, cc - 1U); \
601 const struct counter_stm32_config *config = dev->config; in counter_stm32_irq_handler()
602 struct counter_stm32_data *data = dev->data; in counter_stm32_irq_handler()
603 TIM_TypeDef *timer = config->timer; in counter_stm32_irq_handler()
663 .bus = DT_CLOCKS_CELL(TIMER(idx), bus), \