Lines Matching +full:revision +full:- +full:reg
4 * SPDX-License-Identifier: Apache-2.0
16 #define REG_IDR 0x00 /* ID and Revision Reg. */
17 #define REG_CFG 0x10 /* Configuration Reg. */
18 #define REG_INTE 0x14 /* Interrupt Enable Reg. */
19 #define REG_ISTA 0x18 /* Interrupt Status Reg. */
20 #define REG_CHEN 0x1C /* Channel Enable Reg. */
21 #define REG_CTRL0 0x20 /* Channel 0 Control Reg. */
22 #define REG_RELD0 0x24 /* Channel 0 Reload Reg. */
23 #define REG_CNTR0 0x28 /* Channel 0 Counter Reg. */
24 #define REG_CTRL1 0x30 /* Channel 1 Control Reg. */
25 #define REG_RELD1 0x34 /* Channel 1 Reload Reg. */
26 #define REG_CNTR1 0x38 /* Channel 1 Counter Reg. */
27 #define REG_CTRL2 0x40 /* Channel 2 Control Reg. */
28 #define REG_RELD2 0x44 /* Channel 2 Reload Reg. */
29 #define REG_CNTR2 0x48 /* Channel 2 Counter Reg. */
30 #define REG_CTRL3 0x50 /* Channel 3 Control Reg. */
31 #define REG_RELD3 0x54 /* Channel 3 Reload Reg. */
32 #define REG_CNTR3 0x58 /* Channel 3 Counter Reg. */
34 #define PIT_BASE (((const struct atcpit100_config *)(dev)->config)->base)
46 #define CH_NUM_PER_COUNTER (CHANNEL_NUM - 1)
74 const struct atcpit100_config *config = dev->config; in get_current_tick()
79 now_cnt = top - sys_read32(PIT_CH_CNTR(dev, ch)); in get_current_tick()
81 return (now_cnt / config->divider); in get_current_tick()
87 struct atcpit100_data *data = dev->data; in atcpit100_irq_handler()
97 if (data->top_callback) { in atcpit100_irq_handler()
98 data->top_callback(dev, data->top_user_data); in atcpit100_irq_handler()
119 cb = data->ch_data[i].alarm_callback; in atcpit100_irq_handler()
120 data->ch_data[i].alarm_callback = NULL; in atcpit100_irq_handler()
122 cb(dev, i, cur_ticks, data->ch_data[i].alarm_user_data); in atcpit100_irq_handler()
130 const struct atcpit100_config *config = dev->config; in counter_atcpit100_init()
131 uint32_t reg; in counter_atcpit100_init() local
137 reg = CTRL_CH_MODE_32BIT | CTRL_CH_SRC_PCLK; in counter_atcpit100_init()
138 sys_write32(reg, PIT_CH_CTRL(dev, 0)); in counter_atcpit100_init()
139 sys_write32(reg, PIT_CH_CTRL(dev, 1)); in counter_atcpit100_init()
140 sys_write32(reg, PIT_CH_CTRL(dev, 2)); in counter_atcpit100_init()
141 sys_write32(reg, PIT_CH_CTRL(dev, 3)); in counter_atcpit100_init()
148 reg = config->info.max_top_value * config->divider; in counter_atcpit100_init()
150 /* Set cycle - 1 to reload register */ in counter_atcpit100_init()
151 sys_write32((reg - 1), PIT_CH_RELD(dev, 3)); in counter_atcpit100_init()
153 config->cfg_func(); in counter_atcpit100_init()
155 irq_enable(config->irq_num); in counter_atcpit100_init()
162 struct atcpit100_data *data = dev->data; in atcpit100_start()
164 uint32_t reg; in atcpit100_start() local
166 key = k_spin_lock(&data->lock); in atcpit100_start()
169 reg = sys_read32(PIT_CHEN(dev)); in atcpit100_start()
170 reg |= TIMER0_CHANNEL(3); in atcpit100_start()
171 sys_write32(reg, PIT_CHEN(dev)); in atcpit100_start()
173 k_spin_unlock(&data->lock, key); in atcpit100_start()
180 struct atcpit100_data *data = dev->data; in atcpit100_stop()
182 uint32_t reg; in atcpit100_stop() local
184 key = k_spin_lock(&data->lock); in atcpit100_stop()
187 reg = sys_read32(PIT_INTE(dev)); in atcpit100_stop()
188 reg &= ~TIMER0_CHANNEL(3); in atcpit100_stop()
189 sys_write32(reg, PIT_INTE(dev)); in atcpit100_stop()
192 reg = sys_read32(PIT_CHEN(dev)); in atcpit100_stop()
193 reg &= ~TIMER0_CHANNEL(3); in atcpit100_stop()
194 sys_write32(reg, PIT_CHEN(dev)); in atcpit100_stop()
199 k_spin_unlock(&data->lock, key); in atcpit100_stop()
206 struct atcpit100_data *data = dev->data; in atcpit100_get_value()
209 key = k_spin_lock(&data->lock); in atcpit100_get_value()
213 k_spin_unlock(&data->lock, key); in atcpit100_get_value()
221 const struct atcpit100_config *config = dev->config; in atcpit100_set_alarm()
222 struct atcpit100_data *data = dev->data; in atcpit100_set_alarm()
223 uint32_t top, now_cnt, remain_cnt, alarm_cnt, flags, reg; in atcpit100_set_alarm() local
228 return -ENOTSUP; in atcpit100_set_alarm()
231 if (!alarm_cfg->callback) { in atcpit100_set_alarm()
232 return -EINVAL; in atcpit100_set_alarm()
235 if (data->ch_data[chan_id].alarm_callback) { in atcpit100_set_alarm()
236 return -EBUSY; in atcpit100_set_alarm()
239 key = k_spin_lock(&data->lock); in atcpit100_set_alarm()
244 alarm_cnt = alarm_cfg->ticks * config->divider; in atcpit100_set_alarm()
247 err = -EINVAL; in atcpit100_set_alarm()
251 flags = alarm_cfg->flags; in atcpit100_set_alarm()
252 data->ch_data[chan_id].alarm_callback = alarm_cfg->callback; in atcpit100_set_alarm()
253 data->ch_data[chan_id].alarm_user_data = alarm_cfg->user_data; in atcpit100_set_alarm()
258 now_cnt = top - remain_cnt; in atcpit100_set_alarm()
259 max_rel_val = top - (data->guard_period * config->divider); in atcpit100_set_alarm()
264 reg = alarm_cnt - now_cnt; in atcpit100_set_alarm()
268 reg = alarm_cnt + remain_cnt; in atcpit100_set_alarm()
271 if (reg > max_rel_val) { in atcpit100_set_alarm()
273 err = -ETIME; in atcpit100_set_alarm()
275 data->ch_data[chan_id].alarm_callback = NULL; in atcpit100_set_alarm()
282 reg = 1; in atcpit100_set_alarm()
286 now_cnt = remain_cnt + config->divider - 1; in atcpit100_set_alarm()
287 now_cnt = (now_cnt / config->divider) * config->divider; in atcpit100_set_alarm()
290 reg = alarm_cnt - (now_cnt - remain_cnt); in atcpit100_set_alarm()
293 /* Set cycle - 1 to reload register */ in atcpit100_set_alarm()
294 sys_write32((reg - 1), PIT_CH_RELD(dev, chan_id)); in atcpit100_set_alarm()
297 reg = sys_read32(PIT_INTE(dev)); in atcpit100_set_alarm()
298 reg |= TIMER0_CHANNEL(chan_id); in atcpit100_set_alarm()
299 sys_write32(reg, PIT_INTE(dev)); in atcpit100_set_alarm()
302 reg = sys_read32(PIT_CHEN(dev)); in atcpit100_set_alarm()
303 reg |= TIMER0_CHANNEL(chan_id); in atcpit100_set_alarm()
304 sys_write32(reg, PIT_CHEN(dev)); in atcpit100_set_alarm()
307 k_spin_unlock(&data->lock, key); in atcpit100_set_alarm()
314 struct atcpit100_data *data = dev->data; in atcpit100_cancel_alarm()
316 uint32_t reg; in atcpit100_cancel_alarm() local
319 return -ENOTSUP; in atcpit100_cancel_alarm()
322 key = k_spin_lock(&data->lock); in atcpit100_cancel_alarm()
325 reg = sys_read32(PIT_INTE(dev)); in atcpit100_cancel_alarm()
326 reg &= ~TIMER0_CHANNEL(chan_id); in atcpit100_cancel_alarm()
327 sys_write32(reg, PIT_INTE(dev)); in atcpit100_cancel_alarm()
330 reg = sys_read32(PIT_CHEN(dev)); in atcpit100_cancel_alarm()
331 reg &= ~TIMER0_CHANNEL(chan_id); in atcpit100_cancel_alarm()
332 sys_write32(reg, PIT_CHEN(dev)); in atcpit100_cancel_alarm()
337 data->ch_data[chan_id].alarm_callback = NULL; in atcpit100_cancel_alarm()
339 k_spin_unlock(&data->lock, key); in atcpit100_cancel_alarm()
347 const struct atcpit100_config *config = dev->config; in atcpit100_set_top_value()
348 struct atcpit100_data *data = dev->data; in atcpit100_set_top_value()
349 uint32_t ticks, reg, reset_counter = 1; in atcpit100_set_top_value() local
355 if (data->ch_data[i].alarm_callback) { in atcpit100_set_top_value()
356 return -EBUSY; in atcpit100_set_top_value()
360 if (cfg->ticks > config->info.max_top_value) { in atcpit100_set_top_value()
361 return -ENOTSUP; in atcpit100_set_top_value()
364 key = k_spin_lock(&data->lock); in atcpit100_set_top_value()
366 if (cfg->callback) { in atcpit100_set_top_value()
368 reg = sys_read32(PIT_INTE(dev)); in atcpit100_set_top_value()
369 reg &= ~TIMER0_CHANNEL(3); in atcpit100_set_top_value()
370 sys_write32(reg, PIT_INTE(dev)); in atcpit100_set_top_value()
372 data->top_callback = cfg->callback; in atcpit100_set_top_value()
373 data->top_user_data = cfg->user_data; in atcpit100_set_top_value()
376 reg = sys_read32(PIT_INTE(dev)); in atcpit100_set_top_value()
377 reg |= TIMER0_CHANNEL(3); in atcpit100_set_top_value()
378 sys_write32(reg, PIT_INTE(dev)); in atcpit100_set_top_value()
381 if (cfg->flags & COUNTER_TOP_CFG_DONT_RESET) { in atcpit100_set_top_value()
385 if (ticks >= cfg->ticks) { in atcpit100_set_top_value()
386 err = -ETIME; in atcpit100_set_top_value()
387 if (cfg->flags & COUNTER_TOP_CFG_RESET_WHEN_LATE) { in atcpit100_set_top_value()
394 /* Set cycle - 1 to reload register */ in atcpit100_set_top_value()
395 reg = cfg->ticks * config->divider; in atcpit100_set_top_value()
396 sys_write32((reg - 1), PIT_CH_RELD(dev, 3)); in atcpit100_set_top_value()
400 reg = sys_read32(PIT_CHEN(dev)); in atcpit100_set_top_value()
401 reg &= ~TIMER0_CHANNEL(3); in atcpit100_set_top_value()
402 sys_write32(reg, PIT_CHEN(dev)); in atcpit100_set_top_value()
408 reg = sys_read32(PIT_INTE(dev)); in atcpit100_set_top_value()
409 reg |= TIMER0_CHANNEL(3); in atcpit100_set_top_value()
410 sys_write32(reg, PIT_INTE(dev)); in atcpit100_set_top_value()
413 reg = sys_read32(PIT_CHEN(dev)); in atcpit100_set_top_value()
414 reg |= TIMER0_CHANNEL(3); in atcpit100_set_top_value()
415 sys_write32(reg, PIT_CHEN(dev)); in atcpit100_set_top_value()
418 k_spin_unlock(&data->lock, key); in atcpit100_set_top_value()
425 uint32_t reg = sys_read32(PIT_ISTA(dev)); in atcpit100_get_pending_int() local
427 reg &= (TIMER0_CHANNEL(0) | TIMER0_CHANNEL(1) | in atcpit100_get_pending_int()
430 return !(!reg); in atcpit100_get_pending_int()
435 const struct atcpit100_config *config = dev->config; in atcpit100_get_top_value()
438 return (top / config->divider); in atcpit100_get_top_value()
444 struct atcpit100_data *data = dev->data; in atcpit100_get_guard_period()
446 return data->guard_period; in atcpit100_get_guard_period()
452 const struct atcpit100_config *config = dev->config; in atcpit100_set_guard_period()
453 struct atcpit100_data *data = dev->data; in atcpit100_set_guard_period()
456 if ((ticks * config->divider) > top) { in atcpit100_set_guard_period()
457 return -EINVAL; in atcpit100_set_guard_period()
460 data->guard_period = ticks; in atcpit100_set_guard_period()