2  * Copyright 2020-2024 NXP
4  * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
50 	case MCUX_PORT0_CLK:  in mcux_lpc_syscon_clock_control_on()
53 	case MCUX_PORT1_CLK:  in mcux_lpc_syscon_clock_control_on()
56 	case MCUX_PORT2_CLK:  in mcux_lpc_syscon_clock_control_on()
59 	case MCUX_PORT3_CLK:  in mcux_lpc_syscon_clock_control_on()
62 	case MCUX_PORT4_CLK:  in mcux_lpc_syscon_clock_control_on()
66 	case MCUX_PORT0_CLK:  in mcux_lpc_syscon_clock_control_on()
69 	case MCUX_PORT1_CLK:  in mcux_lpc_syscon_clock_control_on()
72 	case MCUX_PORT2_CLK:  in mcux_lpc_syscon_clock_control_on()
75 	case MCUX_PORT3_CLK:  in mcux_lpc_syscon_clock_control_on()
78 	case MCUX_PORT4_CLK:  in mcux_lpc_syscon_clock_control_on()
95 	case MCUX_FLEXCAN0_CLK:  in mcux_lpc_syscon_clock_control_on()
98 	case MCUX_FLEXCAN1_CLK:  in mcux_lpc_syscon_clock_control_on()
122 /* 0x0 Clock Select Value Set IRTC to use FRO 16K Clk */  in mcux_lpc_syscon_clock_control_on()
125 /* 0x1 Clock Select Value Set IRTC to use Osc 32K Clk */  in mcux_lpc_syscon_clock_control_on()
152 	case MCUX_FLEXCOMM0_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
155 	case MCUX_FLEXCOMM1_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
158 	case MCUX_FLEXCOMM2_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
161 	case MCUX_FLEXCOMM3_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
164 	case MCUX_FLEXCOMM4_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
167 	case MCUX_FLEXCOMM5_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
170 	case MCUX_FLEXCOMM6_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
173 	case MCUX_FLEXCOMM7_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
176 	case MCUX_FLEXCOMM8_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
179 	case MCUX_FLEXCOMM9_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
182 	case MCUX_FLEXCOMM10_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
185 	case MCUX_FLEXCOMM11_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
188 	case MCUX_FLEXCOMM12_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
191 	case MCUX_FLEXCOMM13_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
194 	case MCUX_PMIC_I2C_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
197 	case MCUX_HS_SPI_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
204 	case MCUX_HS_SPI1_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
208 	case MCUX_FLEXCOMM0_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
211 	case MCUX_FLEXCOMM1_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
214 	case MCUX_FLEXCOMM2_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
217 	case MCUX_FLEXCOMM3_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
220 	case MCUX_FLEXCOMM4_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
223 	case MCUX_FLEXCOMM5_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
226 	case MCUX_FLEXCOMM6_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
229 	case MCUX_FLEXCOMM7_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
232 	case MCUX_FLEXCOMM8_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
235 	case MCUX_FLEXCOMM9_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
244 	case MCUX_USDHC1_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
248 	case MCUX_USDHC1_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
251 	case MCUX_USDHC2_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
259 	case MCUX_SDIF_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
265 	case MCUX_MCAN_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
271 	case MCUX_CTIMER0_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
274 	case MCUX_CTIMER1_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
277 	case MCUX_CTIMER2_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
280 	case MCUX_CTIMER3_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
283 	case MCUX_CTIMER4_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
289 	case MCUX_MRT_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
291 	case MCUX_FREEMRT_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
295 	case MCUX_SCTIMER_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
302 	case MCUX_BUS_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
308 	case MCUX_I3C_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
316 	case MCUX_I3C2_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
328 	case MCUX_MIPI_DSI_DPHY_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
331 	case MCUX_MIPI_DSI_ESC_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
334 	case MCUX_LCDIF_PIXEL_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
339 	case MCUX_DMIC_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
344 	case MCUX_FLEXSPI_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
352 	case MCUX_FLEXSPI2_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
359 	case MCUX_ENET_QOS_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
365 	case MCUX_ENET_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
373 	case MCUX_LCDIC_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
379 	case MCUX_LPADC1_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
387 	case MCUX_LPADC2_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
394 	case MCUX_FLEXCAN0_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
397 	case MCUX_FLEXCAN1_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
403 	case MCUX_FLEXIO0_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
409 	case MCUX_AUDIO_MCLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
415 	case MCUX_LPUART0_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
418 	case MCUX_LPUART1_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
421 	case MCUX_LPUART2_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
424 	case MCUX_LPUART3_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
427 	case MCUX_LPUART4_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
433 	case MCUX_LPI2C0_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
436 	case MCUX_LPI2C1_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
439 	case MCUX_LPI2C2_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
442 	case MCUX_LPI2C3_CLK:  in mcux_lpc_syscon_clock_control_get_subsys_rate()
453  * Weak implemenetation of flexspi_clock_set_freq- SOC implementations are
460 	return -ENOTSUP;  in flexspi_clock_set_freq()
481 	case MCUX_FLEXSPI_CLK:  in mcux_lpc_syscon_clock_control_set_subsys_rate()
490 	case MCUX_LCDIC_CLK:  in mcux_lpc_syscon_clock_control_set_subsys_rate()
493 				      ((CLKCTL0->LCDFCLKDIV & CLKCTL0_LCDFCLKDIV_DIV_MASK) + 1));  in mcux_lpc_syscon_clock_control_set_subsys_rate()
500 		return -ENOTSUP;  in mcux_lpc_syscon_clock_control_set_subsys_rate()