Lines Matching +full:divider +full:- +full:int +full:- +full:0
4 * SPDX-License-Identifier: Apache-2.0
28 #define LPC11U6X_PDRUNCFG_MASK 0xC800
30 #define LPC11U6X_SYS_PLL_CLK_SEL_IRC 0x0
31 #define LPC11U6X_SYS_PLL_CLK_SEL_SYSOSC 0x1
33 #define LPC11U6X_FLASH_TIMING_REG 0x4003C010
34 #define LPC11U6X_FLASH_TIMING_3CYCLES 0x2
35 #define LPC11U6X_FLASH_TIMING_MASK 0x3
37 #define LPC11U6X_SYS_PLL_CTRL_MSEL_MASK 0x1F
39 #define LPC11U6X_SYS_PLL_CTRL_PSEL_MASK 0x3
41 #define LPC11U6X_MAIN_CLK_SRC_PLLOUT 0x3
79 volatile uint32_t sys_ahb_clk_div; /* System clock divider */
83 volatile uint32_t ssp0_clk_div; /* SSP0 clock divider */
84 volatile uint32_t usart0_clk_div; /* USART0 clock divider */
85 volatile uint32_t ssp1_clk_div; /* SSP1 clock divider */
86 volatile uint32_t frg_clk_div; /* USART 1-4 fractional baud
87 * rate generator clock divider
92 volatile uint32_t usb_clk_div; /* USB clock divider */
96 volatile uint32_t clk_out_div; /* CLKOUT divider */
98 volatile uint32_t uart_frg_div; /* USART1-4 fractional
99 * generator divider
101 volatile uint32_t uart_frg_mult; /* USART1-4 fractional
110 volatile uint32_t iocon_clk_div[7]; /* IOCON clock divider */
111 volatile uint32_t bod_ctrl; /* Brown-out detect control */
120 volatile uint32_t starterp0; /* Start logic 0 int wake-up */
122 volatile uint32_t starterp1; /* Start logic 1 int wake-up */
124 volatile uint32_t pd_sleep_cfg; /* Deep-sleep power-down
127 volatile uint32_t pd_awake_cfg; /* Power-down states for
128 * wake-up from deep-sleep