Lines Matching +full:timing +full:- +full:config +full:- +full:mask
4 * SPDX-License-Identifier: Apache-2.0
39 #define CAN_XMC4XXX_REG_TO_NODE_IND(reg) (((uint32_t)(reg) - (uint32_t)CAN_NODE0_BASE) / 0x100)
92 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_set_mode()
93 const struct can_xmc4xxx_config *dev_cfg = dev->config; in can_xmc4xxx_set_mode()
95 if (dev_data->common.started) { in can_xmc4xxx_set_mode()
96 return -EBUSY; in can_xmc4xxx_set_mode()
101 return -ENOTSUP; in can_xmc4xxx_set_mode()
105 XMC_CAN_NODE_SetAnalyzerMode(dev_cfg->can); in can_xmc4xxx_set_mode()
107 XMC_CAN_NODE_ReSetAnalyzerMode(dev_cfg->can); in can_xmc4xxx_set_mode()
110 dev_data->common.mode = mode; in can_xmc4xxx_set_mode()
115 static int can_xmc4xxx_set_timing(const struct device *dev, const struct can_timing *timing) in can_xmc4xxx_set_timing() argument
117 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_set_timing()
118 const struct can_xmc4xxx_config *dev_cfg = dev->config; in can_xmc4xxx_set_timing()
121 if (!timing) { in can_xmc4xxx_set_timing()
122 return -EINVAL; in can_xmc4xxx_set_timing()
125 if (dev_data->common.started) { in can_xmc4xxx_set_timing()
126 return -EBUSY; in can_xmc4xxx_set_timing()
129 k_mutex_lock(&dev_data->mutex, K_FOREVER); in can_xmc4xxx_set_timing()
131 reg = FIELD_PREP(CAN_NODE_NBTR_DIV8_Msk, dev_cfg->clock_div8); in can_xmc4xxx_set_timing()
132 reg |= FIELD_PREP(CAN_NODE_NBTR_BRP_Msk, timing->prescaler - 1); in can_xmc4xxx_set_timing()
133 reg |= FIELD_PREP(CAN_NODE_NBTR_TSEG1_Msk, timing->prop_seg + timing->phase_seg1 - 1); in can_xmc4xxx_set_timing()
134 reg |= FIELD_PREP(CAN_NODE_NBTR_TSEG2_Msk, timing->phase_seg2 - 1); in can_xmc4xxx_set_timing()
135 reg |= FIELD_PREP(CAN_NODE_NBTR_SJW_Msk, timing->sjw - 1); in can_xmc4xxx_set_timing()
137 dev_cfg->can->NBTR = reg; in can_xmc4xxx_set_timing()
139 k_mutex_unlock(&dev_data->mutex); in can_xmc4xxx_set_timing()
147 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_send()
149 struct can_xmc4xxx_tx_callback *callbacks = &dev_data->tx_callbacks[0]; in can_xmc4xxx_send()
153 LOG_DBG("Sending %d bytes. Id: 0x%x, ID type: %s %s %s %s", can_dlc_to_bytes(msg->dlc), in can_xmc4xxx_send()
154 msg->id, msg->flags & CAN_FRAME_IDE ? "extended" : "standard", in can_xmc4xxx_send()
155 msg->flags & CAN_FRAME_RTR ? "RTR" : "", in can_xmc4xxx_send()
156 msg->flags & CAN_FRAME_FDF ? "FD frame" : "", in can_xmc4xxx_send()
157 msg->flags & CAN_FRAME_BRS ? "BRS" : ""); in can_xmc4xxx_send()
159 if (msg->dlc > CAN_XMC4XXX_MAX_DLC) { in can_xmc4xxx_send()
160 return -EINVAL; in can_xmc4xxx_send()
163 if (!dev_data->common.started) { in can_xmc4xxx_send()
164 return -ENETDOWN; in can_xmc4xxx_send()
167 if (dev_data->state == CAN_STATE_BUS_OFF) { in can_xmc4xxx_send()
168 return -ENETUNREACH; in can_xmc4xxx_send()
171 if ((msg->flags & (CAN_FRAME_FDF | CAN_FRAME_BRS)) != 0) { in can_xmc4xxx_send()
172 return -ENOTSUP; in can_xmc4xxx_send()
175 if (k_sem_take(&dev_data->tx_sem, timeout) != 0) { in can_xmc4xxx_send()
176 return -EAGAIN; in can_xmc4xxx_send()
179 k_mutex_lock(&dev_data->mutex, K_FOREVER); in can_xmc4xxx_send()
196 mo = dev_data->tx_mo[mailbox_idx]; in can_xmc4xxx_send()
197 mo->MOCTR = CAN_MO_MOCTR_RESMSGVAL_Msk; in can_xmc4xxx_send()
199 if ((msg->flags & CAN_FRAME_IDE) != 0) { in can_xmc4xxx_send()
200 /* MOAR - message object arbitration register */ in can_xmc4xxx_send()
201 mo->MOAR = FIELD_PREP(CAN_MO_MOAR_PRI_Msk, 1) | in can_xmc4xxx_send()
202 FIELD_PREP(CAN_MO_MOAR_ID_Msk, msg->id) | CAN_MO_MOAR_IDE_Msk; in can_xmc4xxx_send()
204 mo->MOAR = FIELD_PREP(CAN_MO_MOAR_PRI_Msk, 1) | in can_xmc4xxx_send()
205 FIELD_PREP(XMC_CAN_MO_MOAR_STDID_Msk, msg->id); in can_xmc4xxx_send()
208 mo->MOFCR &= ~CAN_MO_MOFCR_DLC_Msk; in can_xmc4xxx_send()
209 mo->MOFCR |= FIELD_PREP(CAN_MO_MOFCR_DLC_Msk, msg->dlc); in can_xmc4xxx_send()
211 if ((msg->flags & CAN_FRAME_RTR) != 0) { in can_xmc4xxx_send()
212 mo->MOCTR = CAN_MO_MOCTR_RESDIR_Msk; in can_xmc4xxx_send()
214 mo->MOCTR = CAN_MO_MOCTR_SETDIR_Msk; in can_xmc4xxx_send()
215 memcpy((void *)&mo->MODATAL, &msg->data[0], sizeof(uint32_t)); in can_xmc4xxx_send()
216 memcpy((void *)&mo->MODATAH, &msg->data[4], sizeof(uint32_t)); in can_xmc4xxx_send()
219 mo->MOCTR = CAN_MO_MOCTR_SETTXEN0_Msk | CAN_MO_MOCTR_SETTXEN1_Msk | in can_xmc4xxx_send()
222 mo->MOCTR = CAN_MO_MOCTR_SETTXRQ_Msk; in can_xmc4xxx_send()
224 k_mutex_unlock(&dev_data->mutex); in can_xmc4xxx_send()
238 can_xmc4xxx_num_free_mo--; in can_xmc4xxx_get_mo()
239 return &CAN_MO->MO[i]; in can_xmc4xxx_get_mo()
248 CAN_MO_TypeDef *mo = fifo->base; in can_xmc4xxx_deinit_fifo()
255 mo->MOCTR = CAN_MO_MOCTR_RESMSGVAL_Msk; in can_xmc4xxx_deinit_fifo()
257 next_index = FIELD_GET(CAN_MO_MOSTAT_PNEXT_Msk, mo->MOSTAT); in can_xmc4xxx_deinit_fifo()
258 index = ((uint32_t)mo - (uint32_t)&CAN_MO->MO[0]) / sizeof(*mo); in can_xmc4xxx_deinit_fifo()
260 if ((uint32_t)mo == (uint32_t)fifo->top) { in can_xmc4xxx_deinit_fifo()
263 mo = &CAN_MO->MO[next_index]; in can_xmc4xxx_deinit_fifo()
278 const struct can_xmc4xxx_config *dev_cfg = dev->config; in can_xmc4xxx_init_fifo()
284 return -ENOMEM; in can_xmc4xxx_init_fifo()
291 fifo->base = mo; in can_xmc4xxx_init_fifo()
292 fifo->tail = mo; in can_xmc4xxx_init_fifo()
295 CAN_XMC4XXX_REG_TO_NODE_IND(dev_cfg->can), mo_index); in can_xmc4xxx_init_fifo()
297 /* setup the base object - this controls the filtering for the fifo */ in can_xmc4xxx_init_fifo()
298 mo->MOCTR = CAN_MO_MOCTR_RESMSGVAL_Msk; in can_xmc4xxx_init_fifo()
299 mo->MOAMR &= ~(CAN_MO_MOAMR_AM_Msk | CAN_MO_MOAMR_MIDE_Msk); in can_xmc4xxx_init_fifo()
300 mo->MOAR = 0; in can_xmc4xxx_init_fifo()
302 if ((filter->flags & CAN_FILTER_IDE) != 0) { in can_xmc4xxx_init_fifo()
303 mo->MOAMR |= FIELD_PREP(CAN_MO_MOAMR_AM_Msk, filter->mask) | CAN_MO_MOAMR_MIDE_Msk; in can_xmc4xxx_init_fifo()
304 mo->MOAR |= FIELD_PREP(CAN_MO_MOAR_ID_Msk, filter->id) | CAN_MO_MOAR_IDE_Msk; in can_xmc4xxx_init_fifo()
306 mo->MOAMR |= FIELD_PREP(XMC_CAN_MO_MOAR_STDID_Msk, filter->mask); in can_xmc4xxx_init_fifo()
307 mo->MOAR |= FIELD_PREP(XMC_CAN_MO_MOAR_STDID_Msk, filter->id); in can_xmc4xxx_init_fifo()
310 mo->MOFCR = FIELD_PREP(CAN_MO_MOFCR_MMC_Msk, 1) | CAN_MO_MOFCR_RXIE_Msk; in can_xmc4xxx_init_fifo()
312 mo->MOFCR |= CAN_MO_MOFCR_RMM_Msk; in can_xmc4xxx_init_fifo()
313 mo->MOCTR = CAN_MO_MOCTR_SETDIR_Msk; in can_xmc4xxx_init_fifo()
315 mo->MOCTR = CAN_MO_MOCTR_RESDIR_Msk; in can_xmc4xxx_init_fifo()
319 mo->MOCTR = CAN_MO_MOCTR_RESTXEN0_Msk | CAN_MO_MOCTR_RESTXEN1_Msk | in can_xmc4xxx_init_fifo()
323 mo->MOIPR = FIELD_PREP(CAN_MO_MOIPR_RXINP_Msk, dev_cfg->service_request); in can_xmc4xxx_init_fifo()
331 CAN_XMC4XXX_REG_TO_NODE_IND(dev_cfg->can), mo_index); in can_xmc4xxx_init_fifo()
333 mo->MOCTR = CAN_MO_MOCTR_RESMSGVAL_Msk; in can_xmc4xxx_init_fifo()
334 mo->MOCTR = CAN_MO_MOCTR_SETMSGVAL_Msk | CAN_MO_MOCTR_RESRXEN_Msk; in can_xmc4xxx_init_fifo()
337 mo->MOFGPR = FIELD_PREP(CAN_MO_MOFGPR_CUR_Msk, base_index); in can_xmc4xxx_init_fifo()
346 fifo->base->MOFGPR = reg; in can_xmc4xxx_init_fifo()
347 fifo->top = mo; in can_xmc4xxx_init_fifo()
355 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_add_rx_filter()
358 if ((filter->flags & ~CAN_FILTER_IDE) != 0) { in can_xmc4xxx_add_rx_filter()
359 LOG_ERR("Unsupported CAN filter flags 0x%02x", filter->flags); in can_xmc4xxx_add_rx_filter()
360 return -ENOTSUP; in can_xmc4xxx_add_rx_filter()
363 k_mutex_lock(&dev_data->mutex, K_FOREVER); in can_xmc4xxx_add_rx_filter()
366 if ((BIT(filter_idx) & dev_data->filter_usage) == 0) { in can_xmc4xxx_add_rx_filter()
372 filter_idx = -ENOSPC; in can_xmc4xxx_add_rx_filter()
377 ret = can_xmc4xxx_init_fifo(dev, filter, &dev_data->rx_fifos[filter_idx], false); in can_xmc4xxx_add_rx_filter()
380 k_mutex_unlock(&dev_data->mutex); in can_xmc4xxx_add_rx_filter()
385 ret = can_xmc4xxx_init_fifo(dev, filter, &dev_data->rtr_fifos[filter_idx], true); in can_xmc4xxx_add_rx_filter()
387 can_xmc4xxx_deinit_fifo(dev, &dev_data->rx_fifos[filter_idx]); in can_xmc4xxx_add_rx_filter()
389 k_mutex_unlock(&dev_data->mutex); in can_xmc4xxx_add_rx_filter()
394 dev_data->filter_usage |= BIT(filter_idx); in can_xmc4xxx_add_rx_filter()
395 dev_data->rx_callbacks[filter_idx].function = callback; in can_xmc4xxx_add_rx_filter()
396 dev_data->rx_callbacks[filter_idx].user_data = user_data; in can_xmc4xxx_add_rx_filter()
401 k_mutex_unlock(&dev_data->mutex); in can_xmc4xxx_add_rx_filter()
408 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_remove_rx_filter()
416 k_mutex_lock(&dev_data->mutex, K_FOREVER); in can_xmc4xxx_remove_rx_filter()
418 if ((dev_data->filter_usage & BIT(filter_idx)) == 0) { in can_xmc4xxx_remove_rx_filter()
419 k_mutex_unlock(&dev_data->mutex); in can_xmc4xxx_remove_rx_filter()
424 can_xmc4xxx_deinit_fifo(dev, &dev_data->rx_fifos[filter_idx]); in can_xmc4xxx_remove_rx_filter()
426 can_xmc4xxx_deinit_fifo(dev, &dev_data->rtr_fifos[filter_idx]); in can_xmc4xxx_remove_rx_filter()
429 dev_data->filter_usage &= ~BIT(filter_idx); in can_xmc4xxx_remove_rx_filter()
430 dev_data->rx_callbacks[filter_idx].function = NULL; in can_xmc4xxx_remove_rx_filter()
431 dev_data->rx_callbacks[filter_idx].user_data = NULL; in can_xmc4xxx_remove_rx_filter()
434 k_mutex_unlock(&dev_data->mutex); in can_xmc4xxx_remove_rx_filter()
440 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_set_state_change_callback()
445 dev_data->common.state_change_cb = cb; in can_xmc4xxx_set_state_change_callback()
446 dev_data->common.state_change_cb_user_data = user_data; in can_xmc4xxx_set_state_change_callback()
453 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_get_state_from_status()
454 const struct can_xmc4xxx_config *dev_cfg = dev->config; in can_xmc4xxx_get_state_from_status()
455 uint8_t tec = XMC_CAN_NODE_GetTransmitErrorCounter(dev_cfg->can); in can_xmc4xxx_get_state_from_status()
456 uint8_t rec = XMC_CAN_NODE_GetTransmitErrorCounter(dev_cfg->can); in can_xmc4xxx_get_state_from_status()
459 err_cnt->tx_err_cnt = tec; in can_xmc4xxx_get_state_from_status()
460 err_cnt->rx_err_cnt = rec; in can_xmc4xxx_get_state_from_status()
467 if (!dev_data->common.started) { in can_xmc4xxx_get_state_from_status()
486 const struct can_xmc4xxx_config *dev_cfg = dev->config; in can_xmc4xxx_get_state()
489 status = XMC_CAN_NODE_GetStatus(dev_cfg->can); in can_xmc4xxx_get_state()
498 const struct can_xmc4xxx_config *dev_cfg = dev->config; in can_xmc4xxx_get_core_clock()
501 if (dev_cfg->clock_div8) { in can_xmc4xxx_get_core_clock()
517 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_reset_tx_fifos()
518 struct can_xmc4xxx_tx_callback *tx_callbacks = &dev_data->tx_callbacks[0]; in can_xmc4xxx_reset_tx_fifos()
531 dev_data->tx_mo[i]->MOCTR = CAN_MO_MOCTR_RESMSGVAL_Msk; in can_xmc4xxx_reset_tx_fifos()
533 k_sem_give(&dev_data->tx_sem); in can_xmc4xxx_reset_tx_fifos()
540 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_tx_handler()
541 struct can_xmc4xxx_tx_callback *tx_callbacks = &dev_data->tx_callbacks[0]; in can_xmc4xxx_tx_handler()
544 CAN_MO_TypeDef *mo = dev_data->tx_mo[i]; in can_xmc4xxx_tx_handler()
546 if ((mo->MOSTAT & XMC_CAN_MO_STATUS_TX_PENDING) != 0) { in can_xmc4xxx_tx_handler()
550 mo->MOCTR = XMC_CAN_MO_RESET_STATUS_TX_PENDING; in can_xmc4xxx_tx_handler()
559 k_sem_give(&dev_data->tx_sem); in can_xmc4xxx_tx_handler()
569 if ((uint32_t)fifo->tail == (uint32_t)fifo->top) { in can_xmc4xxx_increment_fifo_tail()
570 fifo->tail = fifo->base; in can_xmc4xxx_increment_fifo_tail()
574 next_index = FIELD_GET(CAN_MO_MOSTAT_PNEXT_Msk, fifo->tail->MOSTAT); in can_xmc4xxx_increment_fifo_tail()
575 fifo->tail = &CAN_MO->MO[next_index]; in can_xmc4xxx_increment_fifo_tail()
580 if (fifo->tail->MOSTAT & XMC_CAN_MO_STATUS_RX_PENDING) { in can_xmc4xxx_is_fifo_empty()
589 uint32_t reg = fifo->base->MOFGPR; in can_xmc4xxx_update_fifo_head()
593 fifo->head = &CAN_MO->MO[head_index]; in can_xmc4xxx_update_fifo_head()
604 bool is_rtr = (fifo->base->MOSTAT & CAN_MO_MOSTAT_DIR_Msk) != 0; in can_xmc4xxx_rx_fifo_handler()
608 CAN_MO_TypeDef *mo_tail = fifo->tail; in can_xmc4xxx_rx_fifo_handler()
612 if ((mo_tail->MOAR & CAN_MO_MOAR_IDE_Msk) != 0) { in can_xmc4xxx_rx_fifo_handler()
614 frame.id = FIELD_GET(CAN_MO_MOAR_ID_Msk, mo_tail->MOAR); in can_xmc4xxx_rx_fifo_handler()
616 frame.id = FIELD_GET(XMC_CAN_MO_MOAR_STDID_Msk, mo_tail->MOAR); in can_xmc4xxx_rx_fifo_handler()
619 frame.dlc = FIELD_GET(CAN_MO_MOFCR_DLC_Msk, mo_tail->MOFCR); in can_xmc4xxx_rx_fifo_handler()
622 memcpy(&frame.data[0], (void *)&mo_tail->MODATAL, sizeof(uint32_t)); in can_xmc4xxx_rx_fifo_handler()
623 memcpy(&frame.data[4], (void *)&mo_tail->MODATAH, sizeof(uint32_t)); in can_xmc4xxx_rx_fifo_handler()
629 if (rx_callback->function != NULL) { in can_xmc4xxx_rx_fifo_handler()
630 rx_callback->function(dev, &frame, rx_callback->user_data); in can_xmc4xxx_rx_fifo_handler()
634 mo_tail->MOCTR = XMC_CAN_MO_RESET_STATUS_RX_PENDING; in can_xmc4xxx_rx_fifo_handler()
641 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_rx_handler()
644 if ((BIT(i) & dev_data->filter_usage) == 0) { in can_xmc4xxx_rx_handler()
648 can_xmc4xxx_update_fifo_head(&dev_data->rx_fifos[i]); in can_xmc4xxx_rx_handler()
649 can_xmc4xxx_rx_fifo_handler(dev, &dev_data->rx_fifos[i], in can_xmc4xxx_rx_handler()
650 &dev_data->rx_callbacks[i]); in can_xmc4xxx_rx_handler()
652 can_xmc4xxx_update_fifo_head(&dev_data->rtr_fifos[i]); in can_xmc4xxx_rx_handler()
653 can_xmc4xxx_rx_fifo_handler(dev, &dev_data->rtr_fifos[i], in can_xmc4xxx_rx_handler()
654 &dev_data->rx_callbacks[i]); in can_xmc4xxx_rx_handler()
661 const struct can_xmc4xxx_config *dev_cfg = dev->config; in can_xmc4xxx_state_change_handler()
662 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_state_change_handler()
667 if (dev_data->state != new_state) { in can_xmc4xxx_state_change_handler()
668 if (dev_data->common.state_change_cb) { in can_xmc4xxx_state_change_handler()
669 dev_data->common.state_change_cb( in can_xmc4xxx_state_change_handler()
671 dev_data->common.state_change_cb_user_data); in can_xmc4xxx_state_change_handler()
674 if (dev_data->state != CAN_STATE_STOPPED && new_state == CAN_STATE_BUS_OFF) { in can_xmc4xxx_state_change_handler()
675 /* re-enable the node after auto bus-off recovery completes */ in can_xmc4xxx_state_change_handler()
676 XMC_CAN_NODE_ResetInitBit(dev_cfg->can); in can_xmc4xxx_state_change_handler()
679 dev_data->state = new_state; in can_xmc4xxx_state_change_handler()
681 if (dev_data->state == CAN_STATE_BUS_OFF) { in can_xmc4xxx_state_change_handler()
682 can_xmc4xxx_reset_tx_fifos(dev, -ENETDOWN); in can_xmc4xxx_state_change_handler()
689 const struct can_xmc4xxx_config *dev_cfg = dev->config; in can_xmc4xxx_isr()
692 status = XMC_CAN_NODE_GetStatus(dev_cfg->can); in can_xmc4xxx_isr()
693 XMC_CAN_NODE_ClearStatus(dev_cfg->can, status); in can_xmc4xxx_isr()
721 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_start()
722 const struct can_xmc4xxx_config *dev_cfg = dev->config; in can_xmc4xxx_start()
726 if (dev_data->common.started) { in can_xmc4xxx_start()
727 return -EALREADY; in can_xmc4xxx_start()
731 can_xmc4xxx_reset_tx_fifos(dev, -ENETDOWN); in can_xmc4xxx_start()
734 if (dev_cfg->common.phy != NULL) { in can_xmc4xxx_start()
735 ret = can_transceiver_enable(dev_cfg->common.phy, dev_data->common.mode); in can_xmc4xxx_start()
742 k_mutex_lock(&dev_data->mutex, K_FOREVER); in can_xmc4xxx_start()
744 XMC_CAN_NODE_DisableConfigurationChange(dev_cfg->can); in can_xmc4xxx_start()
746 dev_data->common.started = true; in can_xmc4xxx_start()
747 XMC_CAN_NODE_ResetInitBit(dev_cfg->can); in can_xmc4xxx_start()
749 k_mutex_unlock(&dev_data->mutex); in can_xmc4xxx_start()
756 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_stop()
757 const struct can_xmc4xxx_config *dev_cfg = dev->config; in can_xmc4xxx_stop()
761 if (!dev_data->common.started) { in can_xmc4xxx_stop()
762 return -EALREADY; in can_xmc4xxx_stop()
766 XMC_CAN_NODE_SetInitBit(dev_cfg->can); in can_xmc4xxx_stop()
768 XMC_CAN_NODE_EnableConfigurationChange(dev_cfg->can); in can_xmc4xxx_stop()
770 can_xmc4xxx_reset_tx_fifos(dev, -ENETDOWN); in can_xmc4xxx_stop()
771 dev_data->common.started = false; in can_xmc4xxx_stop()
774 if (dev_cfg->common.phy != NULL) { in can_xmc4xxx_stop()
775 ret = can_transceiver_disable(dev_cfg->common.phy); in can_xmc4xxx_stop()
787 struct can_xmc4xxx_data *dev_data = dev->data; in can_xmc4xxx_init()
788 const struct can_xmc4xxx_config *dev_cfg = dev->config; in can_xmc4xxx_init()
790 struct can_timing timing = {0}; in can_xmc4xxx_init() local
794 k_sem_init(&dev_data->tx_sem, CONFIG_CAN_XMC4XXX_MAX_TX_QUEUE, in can_xmc4xxx_init()
796 k_mutex_init(&dev_data->mutex); in can_xmc4xxx_init()
806 fdr_step = 1024 - CAN_XMC4XXX_CLOCK_PRESCALER; in can_xmc4xxx_init()
811 can_xmc4xxx_global_reg->FDR &= ~(CAN_FDR_DM_Msk | CAN_FDR_STEP_Msk); in can_xmc4xxx_init()
812 can_xmc4xxx_global_reg->FDR |= FIELD_PREP(CAN_FDR_DM_Msk, XMC_CAN_DM_NORMAL) | in can_xmc4xxx_init()
818 XMC_CAN_NODE_EnableConfigurationChange(dev_cfg->can); in can_xmc4xxx_init()
820 XMC_CAN_NODE_SetReceiveInput(dev_cfg->can, dev_cfg->input_src); in can_xmc4xxx_init()
822 XMC_CAN_NODE_SetInitBit(dev_cfg->can); in can_xmc4xxx_init()
824 XMC_CAN_NODE_SetEventNodePointer(dev_cfg->can, XMC_CAN_NODE_POINTER_EVENT_ALERT, in can_xmc4xxx_init()
825 dev_cfg->service_request); in can_xmc4xxx_init()
827 XMC_CAN_NODE_SetEventNodePointer(dev_cfg->can, XMC_CAN_NODE_POINTER_EVENT_LEC, in can_xmc4xxx_init()
828 dev_cfg->service_request); in can_xmc4xxx_init()
830 XMC_CAN_NODE_SetEventNodePointer(dev_cfg->can, XMC_CAN_NODE_POINTER_EVENT_TRANSFER_OK, in can_xmc4xxx_init()
831 dev_cfg->service_request); in can_xmc4xxx_init()
833 XMC_CAN_NODE_SetEventNodePointer(dev_cfg->can, XMC_CAN_NODE_POINTER_EVENT_FRAME_COUNTER, in can_xmc4xxx_init()
834 dev_cfg->service_request); in can_xmc4xxx_init()
836 XMC_CAN_NODE_EnableEvent(dev_cfg->can, XMC_CAN_NODE_EVENT_TX_INT | in can_xmc4xxx_init()
843 return -ENOMEM; in can_xmc4xxx_init()
846 dev_data->tx_mo[i] = mo; in can_xmc4xxx_init()
849 CAN_XMC4XXX_REG_TO_NODE_IND(dev_cfg->can), mo_index); in can_xmc4xxx_init()
851 mo->MOIPR = FIELD_PREP(CAN_MO_MOIPR_TXINP_Msk, dev_cfg->service_request); in can_xmc4xxx_init()
852 mo->MOFCR = FIELD_PREP(CAN_MO_MOFCR_MMC_Msk, 0) | CAN_MO_MOFCR_TXIE_Msk; in can_xmc4xxx_init()
858 XMC_CAN_NODE_EnableLoopBack(dev_cfg->can); in can_xmc4xxx_init()
861 dev_cfg->irq_config_func(); in can_xmc4xxx_init()
863 dev_data->state = CAN_STATE_STOPPED; in can_xmc4xxx_init()
866 ret = pinctrl_apply_state(dev_cfg->pcfg, PINCTRL_STATE_DEFAULT); in can_xmc4xxx_init()
872 ret = can_calc_timing(dev, &timing, dev_cfg->common.bitrate, in can_xmc4xxx_init()
873 dev_cfg->common.sample_point); in can_xmc4xxx_init()
878 LOG_DBG("Presc: %d, BS1: %d, BS2: %d", timing.prescaler, timing.phase_seg1, in can_xmc4xxx_init()
879 timing.phase_seg2); in can_xmc4xxx_init()
880 LOG_DBG("Sample-point err : %d", ret); in can_xmc4xxx_init()
882 return can_set_timing(dev, &timing); in can_xmc4xxx_init()
930 .service_request = DT_INST_IRQN(inst) - CAN_XMC4XXX_IRQ_MIN, \