Lines Matching refs:index
1075 #define CAN_RENESAS_RA_CHANNEL_IRQ_INIT(index) \ argument
1077 R_ICU->IELSR_b[DT_INST_IRQ_BY_NAME(index, rx, irq)].IELS = \
1078 ELC_EVENT_CAN_COMFRX(DT_INST_PROP(index, channel)); \
1079 R_ICU->IELSR_b[DT_INST_IRQ_BY_NAME(index, tx, irq)].IELS = \
1080 ELC_EVENT_CAN_TX(DT_INST_PROP(index, channel)); \
1081 R_ICU->IELSR_b[DT_INST_IRQ_BY_NAME(index, err, irq)].IELS = \
1082 ELC_EVENT_CAN_CHERR(DT_INST_PROP(index, channel)); \
1084 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, rx, irq), \
1085 DT_INST_IRQ_BY_NAME(index, rx, priority), canfd_common_fifo_rx_isr, \
1087 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, tx, irq), \
1088 DT_INST_IRQ_BY_NAME(index, tx, priority), canfd_channel_tx_isr, NULL, \
1090 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, err, irq), \
1091 DT_INST_IRQ_BY_NAME(index, err, priority), canfd_error_isr, NULL, 0); \
1093 irq_enable(DT_INST_IRQ_BY_NAME(index, rx, irq)); \
1094 irq_enable(DT_INST_IRQ_BY_NAME(index, tx, irq)); \
1095 irq_enable(DT_INST_IRQ_BY_NAME(index, err, irq)); \
1098 #define CAN_RENESAS_RA_INIT(index) \ argument
1099 PINCTRL_DT_INST_DEFINE(index); \
1100 static canfd_afl_entry_t canfd_afl##index[DT_INST_PROP(index, rx_max_filters)]; \
1102 can_renesas_ra_rx_filter##index[DT_INST_PROP(index, rx_max_filters)]; \
1103 static can_bit_timing_cfg_t g_canfd_bit_timing##index; \
1104 static const struct can_renesas_ra_cfg can_renesas_ra_cfg##index = { \
1105 .common = CAN_DT_DRIVER_CONFIG_INST_GET(index, 0, 5000000), \
1106 .global_dev = DEVICE_DT_GET(DT_INST_PARENT(index)), \
1107 .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
1108 .dll_clk = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR_BY_NAME(index, dllclk)), \
1111 .mstp = DT_INST_CLOCKS_CELL_BY_NAME(index, dllclk, mstp), \
1112 .stop_bit = DT_INST_CLOCKS_CELL_BY_NAME(index, dllclk, stop_bit), \
1114 .rx_filter_num = DT_INST_PROP(index, rx_max_filters), \
1116 static canfd_instance_ctrl_t fsp_canfd_ctrl##index; \
1117 static canfd_extended_cfg_t fsp_canfd_extend####index = { \
1118 .p_afl = canfd_afl##index, \
1123 static can_cfg_t fsp_canfd_cfg####index = { \
1124 .channel = DT_INST_PROP(index, channel), \
1125 .ipl = DT_INST_IRQ_BY_NAME(index, err, priority), \
1126 .error_irq = DT_INST_IRQ_BY_NAME(index, err, irq), \
1127 .rx_irq = DT_INST_IRQ_BY_NAME(index, rx, irq), \
1128 .tx_irq = DT_INST_IRQ_BY_NAME(index, tx, irq), \
1129 .p_extend = &fsp_canfd_extend##index, \
1130 .p_bit_timing = &g_canfd_bit_timing##index, \
1131 .p_context = DEVICE_DT_INST_GET(index), \
1134 static struct can_renesas_ra_data can_renesas_ra_data##index = { \
1137 .p_ctrl = &fsp_canfd_ctrl##index, \
1138 .p_cfg = &fsp_canfd_cfg##index, \
1141 .rx_filter = can_renesas_ra_rx_filter##index, \
1142 .dev = DEVICE_DT_INST_GET(index), \
1144 static int can_renesas_ra_init##index(const struct device *dev) \
1146 const struct device *global_canfd = DEVICE_DT_GET(DT_INST_PARENT(index)); \
1150 CAN_RENESAS_RA_CHANNEL_IRQ_INIT(index) \
1153 CAN_DEVICE_DT_INST_DEFINE(index, can_renesas_ra_init##index, NULL, \
1154 &can_renesas_ra_data##index, &can_renesas_ra_cfg##index, \