4  * SPDX-License-Identifier: Apache-2.0
36 	const struct can_mcan_config *mcan_config = dev->config;  in mcux_mcan_read_reg()
37 	const struct mcux_mcan_config *mcux_config = mcan_config->custom;  in mcux_mcan_read_reg()
39 	return can_mcan_sys_read_reg(mcux_config->base, reg, val);  in mcux_mcan_read_reg()
44 	const struct can_mcan_config *mcan_config = dev->config;  in mcux_mcan_write_reg()
45 	const struct mcux_mcan_config *mcux_config = mcan_config->custom;  in mcux_mcan_write_reg()
47 	return can_mcan_sys_write_reg(mcux_config->base, reg, val);  in mcux_mcan_write_reg()
52 	const struct can_mcan_config *mcan_config = dev->config;  in mcux_mcan_read_mram()
53 	const struct mcux_mcan_config *mcux_config = mcan_config->custom;  in mcux_mcan_read_mram()
55 	return can_mcan_sys_read_mram(mcux_config->mram, offset, dst, len);  in mcux_mcan_read_mram()
58 static int mcux_mcan_write_mram(const struct device *dev, uint16_t offset, const void *src,  in mcux_mcan_write_mram()  argument
61 	const struct can_mcan_config *mcan_config = dev->config;  in mcux_mcan_write_mram()
62 	const struct mcux_mcan_config *mcux_config = mcan_config->custom;  in mcux_mcan_write_mram()
64 	return can_mcan_sys_write_mram(mcux_config->mram, offset, src, len);  in mcux_mcan_write_mram()
69 	const struct can_mcan_config *mcan_config = dev->config;  in mcux_mcan_clear_mram()
70 	const struct mcux_mcan_config *mcux_config = mcan_config->custom;  in mcux_mcan_clear_mram()
72 	return can_mcan_sys_clear_mram(mcux_config->mram, offset, len);  in mcux_mcan_clear_mram()
77 	const struct can_mcan_config *mcan_config = dev->config;  in mcux_mcan_get_core_clock()
78 	const struct mcux_mcan_config *mcux_config = mcan_config->custom;  in mcux_mcan_get_core_clock()
80 	return clock_control_get_rate(mcux_config->clock_dev, mcux_config->clock_subsys,  in mcux_mcan_get_core_clock()
86 	const struct can_mcan_config *mcan_config = dev->config;  in mcux_mcan_init()
87 	const struct mcux_mcan_config *mcux_config = mcan_config->custom;  in mcux_mcan_init()
88 	const uintptr_t mrba = mcux_config->mram & MCUX_MCAN_MRBA_BA;  in mcux_mcan_init()
91 	if (!device_is_ready(mcux_config->clock_dev)) {  in mcux_mcan_init()
93 		return -ENODEV;  in mcux_mcan_init()
96 	if (!device_is_ready(mcux_config->reset.dev)) {  in mcux_mcan_init()
98 		return -ENODEV;  in mcux_mcan_init()
101 	err = reset_line_toggle(mcux_config->reset.dev, mcux_config->reset.id);  in mcux_mcan_init()
106 	err = pinctrl_apply_state(mcux_config->pincfg, PINCTRL_STATE_DEFAULT);  in mcux_mcan_init()
111 	err = clock_control_on(mcux_config->clock_dev, mcux_config->clock_subsys);  in mcux_mcan_init()
114 		return -EINVAL;  in mcux_mcan_init()
119 		return -EIO;  in mcux_mcan_init()
122 	err = can_mcan_configure_mram(dev, mrba, mcux_config->mram);  in mcux_mcan_init()
124 		return -EIO;  in mcux_mcan_init()
133 	mcux_config->irq_config_func(dev);  in mcux_mcan_init()
156 	 * prescaler register (NBTP)" table in the SoC reference manual.
172 	 * and prescaler register (DBTP)" table in the SoC reference manual.