Lines Matching +full:128 +full:- +full:bit

4  * SPDX-License-Identifier: Apache-2.0
66  * Startup time of 128 OSC1 clock cycles at 1MHz (minimum clock in frequency)
67  * see MCP2515 datasheet section 8.1 Oscillator Start-up Timer
69 #define MCP2515_OSC_STARTUP_US		128U
116 #define MCP2515_CANINTF_RX0IF           BIT(0)
117 #define MCP2515_CANINTF_RX1IF           BIT(1)
118 #define MCP2515_CANINTF_TX0IF           BIT(2)
119 #define MCP2515_CANINTF_TX1IF           BIT(3)
120 #define MCP2515_CANINTF_TX2IF           BIT(4)
121 #define MCP2515_CANINTF_ERRIF           BIT(5)
122 #define MCP2515_CANINTF_WAKIF           BIT(6)
123 #define MCP2515_CANINTF_MERRF           BIT(7)
125 #define MCP2515_INTE_RX0IE              BIT(0)
126 #define MCP2515_INTE_RX1IE              BIT(1)
127 #define MCP2515_INTE_TX0IE              BIT(2)
128 #define MCP2515_INTE_TX1IE              BIT(3)
129 #define MCP2515_INTE_TX2IE              BIT(4)
130 #define MCP2515_INTE_ERRIE              BIT(5)
131 #define MCP2515_INTE_WAKIE              BIT(6)
132 #define MCP2515_INTE_MERRE              BIT(7)
134 #define MCP2515_EFLG_EWARN              BIT(0)
135 #define MCP2515_EFLG_RXWAR              BIT(1)
136 #define MCP2515_EFLG_TXWAR              BIT(2)
137 #define MCP2515_EFLG_RXEP               BIT(3)
138 #define MCP2515_EFLG_TXEP               BIT(4)
139 #define MCP2515_EFLG_TXBO               BIT(5)
140 #define MCP2515_EFLG_RX0OVR             BIT(6)
141 #define MCP2515_EFLG_RX1OVR             BIT(7)
143 #define MCP2515_TXCTRL_TXREQ			BIT(3)