33 int can_mcan_write_reg(const struct device *dev, uint16_t reg, uint32_t val)  in can_mcan_write_reg()  function
62 	err = can_mcan_write_reg(dev, CAN_MCAN_CCCR, cccr);  in can_mcan_exit_sleep_mode()
77 			err = can_mcan_write_reg(dev, CAN_MCAN_CCCR, cccr);  in can_mcan_exit_sleep_mode()
115 	err = can_mcan_write_reg(dev, CAN_MCAN_CCCR, cccr);  in can_mcan_enter_init_mode()
130 			err = can_mcan_write_reg(dev, CAN_MCAN_CCCR, cccr);  in can_mcan_enter_init_mode()
167 	err = can_mcan_write_reg(dev, CAN_MCAN_CCCR, cccr);  in can_mcan_leave_init_mode()
214 	err = can_mcan_write_reg(dev, CAN_MCAN_NBTP, nbtp);  in can_mcan_set_timing()
253 		err = can_mcan_write_reg(dev, CAN_MCAN_TDCR, FIELD_PREP(CAN_MCAN_TDCR_TDCO, tdco));  in can_mcan_set_timing_data()
262 	err = can_mcan_write_reg(dev, CAN_MCAN_DBTP, dbtp);  in can_mcan_set_timing_data()
434 	err = can_mcan_write_reg(dev, CAN_MCAN_CCCR, cccr);  in can_mcan_set_mode()
439 	err = can_mcan_write_reg(dev, CAN_MCAN_TEST, test);  in can_mcan_set_mode()
477 		err = can_mcan_write_reg(dev, CAN_MCAN_TXBCR, CAN_MCAN_TXBCR_CR);  in can_mcan_state_change_handler()
506 			err = can_mcan_write_reg(dev, CAN_MCAN_CCCR, cccr);  in can_mcan_state_change_handler()
547 		err = can_mcan_write_reg(dev, CAN_MCAN_TXEFA, event_idx);  in can_mcan_tx_event_handler()
639 		err = can_mcan_write_reg(dev, CAN_MCAN_IR, ir & events);  in can_mcan_line_0_isr()
780 		err = can_mcan_write_reg(dev, fifo_ack_reg, get_idx);  in can_mcan_get_message()
814 		err = can_mcan_write_reg(dev, CAN_MCAN_IR, events & ir);  in can_mcan_line_1_isr()
1032 	err = can_mcan_write_reg(dev, CAN_MCAN_TXBAR, BIT(put_idx));  in can_mcan_send()
1267 	err = can_mcan_write_reg(dev, CAN_MCAN_CCCR, cccr);  in can_mcan_enable_configuration_change()
1300 	err = can_mcan_write_reg(dev, CAN_MCAN_SIDFC, reg);  in can_mcan_configure_mram()
1308 	err = can_mcan_write_reg(dev, CAN_MCAN_XIDFC, reg);  in can_mcan_configure_mram()
1316 	err = can_mcan_write_reg(dev, CAN_MCAN_RXF0C, reg);  in can_mcan_configure_mram()
1324 	err = can_mcan_write_reg(dev, CAN_MCAN_RXF1C, reg);  in can_mcan_configure_mram()
1331 	err = can_mcan_write_reg(dev, CAN_MCAN_RXBC, reg);  in can_mcan_configure_mram()
1339 	err = can_mcan_write_reg(dev, CAN_MCAN_TXEFC, reg);  in can_mcan_configure_mram()
1347 	err = can_mcan_write_reg(dev, CAN_MCAN_TXBC, reg);  in can_mcan_configure_mram()
1354 	err = can_mcan_write_reg(dev, CAN_MCAN_TXESC, reg);  in can_mcan_configure_mram()
1361 	err = can_mcan_write_reg(dev, CAN_MCAN_RXESC, reg);  in can_mcan_configure_mram()
1437 	err = can_mcan_write_reg(dev, CAN_MCAN_CCCR, reg);  in can_mcan_init()
1449 	err = can_mcan_write_reg(dev, CAN_MCAN_TEST, reg);  in can_mcan_init()
1464 	err = can_mcan_write_reg(dev, CAN_MCAN_GFC, reg);  in can_mcan_init()
1514 	err = can_mcan_write_reg(dev, CAN_MCAN_IE, reg);  in can_mcan_init()
1520 	err = can_mcan_write_reg(dev, CAN_MCAN_ILS, reg);  in can_mcan_init()
1526 	err = can_mcan_write_reg(dev, CAN_MCAN_ILE, reg);  in can_mcan_init()
1533 	err = can_mcan_write_reg(dev, CAN_MCAN_TXBTIE, reg);  in can_mcan_init()